Alliance Memory AS4C32M16SB-7TIN, SDRAM 512Mbit Surface Mount, 200MHz, 3 V to 3.6 V, 54-Pin TSOP
- RS 제품 번호:
- 230-8428
- 제조사 부품 번호:
- AS4C32M16SB-7TIN
- 제조업체:
- Alliance Memory
대량 구매 할인 기용 가능
Subtotal (1 unit)*
₩22,716.04
재고있음
- 추가로 2025년 12월 29일 부터 93 개 단위 배송
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수량 | 한팩당 |
|---|---|
| 1 - 9 | ₩22,716.04 |
| 10 - 24 | ₩21,033.44 |
| 25 - 49 | ₩20,758.96 |
| 50 - 74 | ₩20,499.52 |
| 75 + | ₩20,093.44 |
* 참고 가격: 실제 구매가격과 다를 수 있습니다
- RS 제품 번호:
- 230-8428
- 제조사 부품 번호:
- AS4C32M16SB-7TIN
- 제조업체:
- Alliance Memory
사양
참조 문서
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제품 세부 사항
제품 정보를 선택해 유사 제품을 찾기
모두 선택 | 제품 정보 | 값 |
|---|---|---|
| 브랜드 | Alliance Memory | |
| Memory Size | 512Mbit | |
| Organisation | 32M x 16 | |
| SDRAM Class | DDR | |
| Data Rate | 200MHz | |
| Data Bus Width | 16bit | |
| Address Bus Width | 13bit | |
| Number of Bits per Word | 16bit | |
| Maximum Random Access Time | 5.4ns | |
| Number of Words | 32 M | |
| Mounting Type | Surface Mount | |
| Package Type | TSOP | |
| Pin Count | 54 | |
| Dimensions | 22.35 x 10.29 x 1.2mm | |
| Height | 1.2mm | |
| Length | 22.35mm | |
| Maximum Operating Temperature | +85 °C | |
| Width | 10.29mm | |
| Maximum Operating Supply Voltage | 3.6 V | |
| Minimum Operating Temperature | -40 °C | |
| Minimum Operating Supply Voltage | 3 V | |
| 모두 선택 | ||
|---|---|---|
브랜드 Alliance Memory | ||
Memory Size 512Mbit | ||
Organisation 32M x 16 | ||
SDRAM Class DDR | ||
Data Rate 200MHz | ||
Data Bus Width 16bit | ||
Address Bus Width 13bit | ||
Number of Bits per Word 16bit | ||
Maximum Random Access Time 5.4ns | ||
Number of Words 32 M | ||
Mounting Type Surface Mount | ||
Package Type TSOP | ||
Pin Count 54 | ||
Dimensions 22.35 x 10.29 x 1.2mm | ||
Height 1.2mm | ||
Length 22.35mm | ||
Maximum Operating Temperature +85 °C | ||
Width 10.29mm | ||
Maximum Operating Supply Voltage 3.6 V | ||
Minimum Operating Temperature -40 °C | ||
Minimum Operating Supply Voltage 3 V | ||
The Alliance Memory 512Mb SDRAM is a high-speed CMOS synchronous DRAM containing 512 Mbits. It is internally configured as 4 Banks of 8M word x 16 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Read and write accesses to the SDRAM are burst oriented
accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of a Bank Activate command which is then followed by a Read or Write command.
Auto Refresh and Self Refresh
8192 refresh cycles/64ms
CKE power down mode
Single +3.3V ±0.3V power supply
8192 refresh cycles/64ms
CKE power down mode
Single +3.3V ±0.3V power supply
For these non-cancellable (NC), and non-returnable (NR) products, Terms and Conditions apply.
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