제조사부품번호

Alliance Memory SDRAM 256 MB Surface, 54-Pin 16 bit TSOP

RS 제품 번호:: 230-8415
제조사 부품 번호:: AS4C16M16SA-6TIN
제조업체:: Alliance Memory

Alliance Memory SDRAM 256 MB Surface, 54-Pin 16 bit TSOP

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대량 구매 할인 기용 가능

Subtotal (1 tray of 108 units)*

₩614,196.00

현재 액세스할 수 없는 재고 정보

수량	한팩당	Per Tray*
108 - 216	₩5,687.00	₩614,196.00
324 - 432	₩5,515.92	₩595,779.52
540 - 972	₩5,406.88	₩583,862.20
1080 +	₩5,243.32	₩566,359.40

* 참고 가격: 실제 구매가격과 다를 수 있습니다

RS 제품 번호:: 230-8415
제조사 부품 번호:: AS4C16M16SA-6TIN
제조업체:: Alliance Memory

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모두 선택	제품 정보	값
	브랜드	Alliance Memory
	Memory Size	256MB
	Product Type	SDRAM
	Organisation	16M x 16 Bit
	Data Bus Width	16bit
	Address Bus Width	13bit
	Number of Bits per Word	16
	Maximum Clock Frequency	166MHz
	Maximum Random Access Time	5ns
	Number of Words	4M
	Mount Type	Surface
	Package Type	TSOP
	Minimum Operating Temperature	-40°C
	Pin Count	54
	Maximum Operating Temperature	85°C
	Width	10.29 mm
	Length	22.35mm
	Height	1.2mm
	Standards/Approvals	No
	Series	AS4C16M16SA-C&I
	Supply Current	60mA
	Maximum Supply Voltage	3.6V
	Automotive Standard	No
	Minimum Supply Voltage	3V

	모두 선택
	브랜드 Alliance Memory
	Memory Size 256MB
	Product Type SDRAM
	Organisation 16M x 16 Bit
	Data Bus Width 16bit
	Address Bus Width 13bit
	Number of Bits per Word 16
	Maximum Clock Frequency 166MHz
	Maximum Random Access Time 5ns
	Number of Words 4M
	Mount Type Surface
	Package Type TSOP
	Minimum Operating Temperature -40°C
	Pin Count 54
	Maximum Operating Temperature 85°C
	Width 10.29 mm
	Length 22.35mm
	Height 1.2mm
	Standards/Approvals No
	Series AS4C16M16SA-C&I
	Supply Current 60mA
	Maximum Supply Voltage 3.6V
	Automotive Standard No
	Minimum Supply Voltage 3V

Datasheet - AS4C16M16SA-6TIN

The Alliance Memory 256Mb SDRAM is a high-speed CMOS synchronous DRAM containing 256 Mbits. It is internally configured as 4 Banks of 4M word x 16 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of a BankActivate command which is then followed by a Read or Write command.

Fast access time from clock: 5/5.4 ns

Fast clock rate: 166/143 MHz

Fully synchronous operation

Internal pipelined architecture

4M word x 16-bit x 4-bank

Alliance Memory SDRAM 256 MB Surface, 54-Pin 16 bit TSOP

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