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Alliance Memory AS4C4M16SA-7TCN SDRAM 64 MB Surface, 54-Pin 16 bit TSOP

RS 제품 번호:: 230-8434
제조사 부품 번호:: AS4C4M16SA-7TCN
제조업체:: Alliance Memory

Alliance Memory AS4C4M16SA-7TCN SDRAM 64 MB Surface, 54-Pin 16 bit TSOP

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대량 구매 할인 기용 가능

Subtotal (1 pack of 5 units)*

₩18,950.40

재고있음

추가로 2026년 2월 16일 부터 10 개 단위 배송

더 자세한 내용이 필요하신가요? 필요한 수량을 입력하고 '배송일 확인'을 클릭하면 더 많은 재고 및 배송 세부정보를 확인하실 수 있습니다.

수량	한팩당	한팩당*
5 - 5	₩3,790.08	₩18,950.40
10 - 20	₩3,718.64	₩18,593.20
25 - 45	₩3,654.72	₩18,273.60
50 - 70	₩3,590.80	₩17,954.00
75 +	₩3,526.88	₩17,634.40

* 참고 가격: 실제 구매가격과 다를 수 있습니다

RS 제품 번호:: 230-8434
제조사 부품 번호:: AS4C4M16SA-7TCN
제조업체:: Alliance Memory

참조 문서

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제품 세부 사항

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모두 선택	제품 정보	값
	브랜드	Alliance Memory
	Memory Size	64MB
	Product Type	SDRAM
	Organisation	4M x 16 bit
	Data Bus Width	16bit
	Address Bus Width	12bit
	Maximum Clock Frequency	166MHz
	Number of Bits per Word	16
	Maximum Random Access Time	5.4ns
	Number of Words	1M
	Mount Type	Surface
	Package Type	TSOP
	Pin Count	54
	Minimum Operating Temperature	0°C
	Maximum Operating Temperature	70°C
	Width	22.35 mm
	Length	22.35mm
	Standards/Approvals	No
	Height	1.2mm
	Series	AS4C4M16SA-C&I
	Minimum Supply Voltage	3V
	Maximum Supply Voltage	3.6V
	Automotive Standard	No

	모두 선택
	브랜드 Alliance Memory
	Memory Size 64MB
	Product Type SDRAM
	Organisation 4M x 16 bit
	Data Bus Width 16bit
	Address Bus Width 12bit
	Maximum Clock Frequency 166MHz
	Number of Bits per Word 16
	Maximum Random Access Time 5.4ns
	Number of Words 1M
	Mount Type Surface
	Package Type TSOP
	Pin Count 54
	Minimum Operating Temperature 0°C
	Maximum Operating Temperature 70°C
	Width 22.35 mm
	Length 22.35mm
	Standards/Approvals No
	Height 1.2mm
	Series AS4C4M16SA-C&I
	Minimum Supply Voltage 3V
	Maximum Supply Voltage 3.6V
	Automotive Standard No

Datasheet - AS4C4M16SA-7TCN

The Alliance Memory 64Mb SDRAM is a high-speed CMOS synchronous DRAM containing 64 Mbits. It is internally configured as 4 Banks of 1M word x 16 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of a Bank Activate command which is then followed by a Read or Write command.

Fast access time from clock: 4.5/5.4/5.4 ns

Fast clock rate: 200/166/143 MHz

Fully synchronous operation

Internal pipelined architecture

1M word x 16-bit x 4-bank

Alliance Memory AS4C4M16SA-7TCN SDRAM 64 MB Surface, 54-Pin 16 bit TSOP

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