제조사부품번호

Nexperia 74AUP2G08DC,125, 2 2-Input AND Schmitt Trigger Input Logic Gate, 8-Pin VSSOP

RS 제품 번호:: 153-2935
제조사 부품 번호:: 74AUP2G08DC,125
제조업체:: Nexperia

Nexperia 74AUP2G08DC,125, 2 2-Input AND Schmitt Trigger Input Logic Gate, 8-Pin VSSOP

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대량 구매 할인 기용 가능

Subtotal (1 pack of 25 units)*

₩10,434.00

일시적 품절

2026년 7월 28일 부터 배송

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수량	한팩당	한팩당*
25 - 725	₩417.36	₩10,415.20
750 - 1475	₩406.08	₩10,152.00
1500 +	₩398.56	₩9,982.80

* 참고 가격: 실제 구매가격과 다를 수 있습니다

RS 제품 번호:: 153-2935
제조사 부품 번호:: 74AUP2G08DC,125
제조업체:: Nexperia

참조 문서

제정법과 컴플라이언스

제품 세부 사항

제품 정보를 선택해 유사 제품을 찾기

모두 선택	제품 정보	값
	브랜드	Nexperia
	Product Type	Logic Gate
	Logic Function	AND
	Mount Type	Surface
	Number of Elements	2
	Number of Inputs per Gate	2
	Schmitt Trigger Input	Yes
	Package Type	VSSOP
	Pin Count	8
	Logic Family	AUP
	Input Type	CMOS
	Minimum Operating Temperature	-40°C
	Maximum High Level Output Current	-4mA
	Maximum Propagation Delay Time @ CL	8.3ns
	Maximum Operating Temperature	125°C
	Length	2.1mm
	Height	0.85mm
	Maximum Supply Voltage	3.6V
	Standards/Approvals	No
	Series	74AUP2G
	Width	2.4 mm
	Minimum Supply Voltage	0.8V
	Maximum Low Level Output Current	4mA
	Automotive Standard	No
	Output Type	ECL

	모두 선택
	브랜드 Nexperia
	Product Type Logic Gate
	Logic Function AND
	Mount Type Surface
	Number of Elements 2
	Number of Inputs per Gate 2
	Schmitt Trigger Input Yes
	Package Type VSSOP
	Pin Count 8
	Logic Family AUP
	Input Type CMOS
	Minimum Operating Temperature -40°C
	Maximum High Level Output Current -4mA
	Maximum Propagation Delay Time @ CL 8.3ns
	Maximum Operating Temperature 125°C
	Length 2.1mm
	Height 0.85mm
	Maximum Supply Voltage 3.6V
	Standards/Approvals No
	Series 74AUP2G
	Width 2.4 mm
	Minimum Supply Voltage 0.8V
	Maximum Low Level Output Current 4mA
	Automotive Standard No
	Output Type ECL

Low-power dual 2-input AND gate, The 74AUP2G08 provides the dual 2-input AND function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing a damaging backflow current through the device when it is powered down.

Wide supply voltage range from 0.8 V to 3.6 V

High noise immunity

Low static power consumption, ICC = 0.9 μA (maximum)

Latch-up performance exceeds 100 mA per JESD78 Class II

Inputs accept voltages up to 3.6 V

Low noise overshoot and undershoot < 10 % of VCC

IOFF circuitry provides partial power-down mode operation

Multiple package options

Nexperia 74AUP2G08DC,125, 2 2-Input AND Schmitt Trigger Input Logic Gate, 8-Pin VSSOP

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