Nexperia 74AUP2G08DC,125, Dual 2-Input AND Schmitt Trigger Logic Gate, 8-Pin VSSOP
- RS 제품 번호:
- 153-2935
- 제조사 부품 번호:
- 74AUP2G08DC,125
- 제조업체:
- Nexperia
대량 구매 할인 기용 가능
Subtotal (1 pack of 25 units)*
₩10,434.00
일시적 품절
- 2026년 6월 29일 부터 배송
더 자세한 내용이 필요하신가요? 필요한 수량을 입력하고 '배송일 확인'을 클릭하면 더 많은 재고 및 배송 세부정보를 확인하실 수 있습니다.
수량 | 한팩당 | 한팩당* |
|---|---|---|
| 25 - 725 | ₩417.36 | ₩10,415.20 |
| 750 - 1475 | ₩406.08 | ₩10,152.00 |
| 1500 + | ₩398.56 | ₩9,982.80 |
* 참고 가격: 실제 구매가격과 다를 수 있습니다
- RS 제품 번호:
- 153-2935
- 제조사 부품 번호:
- 74AUP2G08DC,125
- 제조업체:
- Nexperia
사양
참조 문서
제정법과 컴플라이언스
제품 세부 사항
제품 정보를 선택해 유사 제품을 찾기
모두 선택 | 제품 정보 | 값 |
|---|---|---|
| 브랜드 | Nexperia | |
| Logic Function | AND | |
| Mounting Type | Surface Mount | |
| Number of Elements | 2 | |
| Number of Inputs per Gate | 2 | |
| Schmitt Trigger Input | Yes | |
| Package Type | VSSOP | |
| Pin Count | 8 | |
| Logic Family | AUP | |
| Input Type | CMOS | |
| Maximum Operating Supply Voltage | 3.6 V | |
| Maximum High Level Output Current | -4mA | |
| Maximum Propagation Delay Time @ Maximum CL | 24 @ 30 pF | |
| Minimum Operating Supply Voltage | 0.8 V | |
| Maximum Low Level Output Current | 4mA | |
| Maximum Operating Temperature | +125 °C | |
| Width | 2.4mm | |
| Dimensions | 2.1 x 2.4 x 0.85mm | |
| Height | 0.85mm | |
| Minimum Operating Temperature | -40 °C | |
| Length | 2.1mm | |
| Output Type | ECL | |
| Propagation Delay Test Condition | 30pF | |
| 모두 선택 | ||
|---|---|---|
브랜드 Nexperia | ||
Logic Function AND | ||
Mounting Type Surface Mount | ||
Number of Elements 2 | ||
Number of Inputs per Gate 2 | ||
Schmitt Trigger Input Yes | ||
Package Type VSSOP | ||
Pin Count 8 | ||
Logic Family AUP | ||
Input Type CMOS | ||
Maximum Operating Supply Voltage 3.6 V | ||
Maximum High Level Output Current -4mA | ||
Maximum Propagation Delay Time @ Maximum CL 24 @ 30 pF | ||
Minimum Operating Supply Voltage 0.8 V | ||
Maximum Low Level Output Current 4mA | ||
Maximum Operating Temperature +125 °C | ||
Width 2.4mm | ||
Dimensions 2.1 x 2.4 x 0.85mm | ||
Height 0.85mm | ||
Minimum Operating Temperature -40 °C | ||
Length 2.1mm | ||
Output Type ECL | ||
Propagation Delay Test Condition 30pF | ||
Low-power dual 2-input AND gate, The 74AUP2G08 provides the dual 2-input AND function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
Low static power consumption, ICC = 0.9 μA (maximum)
Latch-up performance exceeds 100 mA per JESD78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of VCC
IOFF circuitry provides partial power-down mode operation
Multiple package options
High noise immunity
Low static power consumption, ICC = 0.9 μA (maximum)
Latch-up performance exceeds 100 mA per JESD78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of VCC
IOFF circuitry provides partial power-down mode operation
Multiple package options
For these non-cancellable (NC), and non-returnable (NR) products, Terms and Conditions apply.
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