Nexperia 74AUP1T08GW-Q100H 2-Input AND Schmitt Trigger Input Logic Gate, 5-Pin TSSOP-5
- RS 제품 번호:
- 240-1725
- 제조사 부품 번호:
- 74AUP1T08GW-Q100H
- 제조업체:
- Nexperia
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대량 구매 할인 기용 가능
Subtotal (1 pack of 25 units)*
₩7,708.00
일시적 품절
- 2026년 6월 03일 부터 2,975 개 단위 배송
더 자세한 내용이 필요하신가요? 필요한 수량을 입력하고 '배송일 확인'을 클릭하면 더 많은 재고 및 배송 세부정보를 확인하실 수 있습니다.
수량 | 한팩당 | 한팩당* |
|---|---|---|
| 25 - 25 | ₩308.32 | ₩7,726.80 |
| 50 - 75 | ₩304.56 | ₩7,595.20 |
| 100 - 225 | ₩298.92 | ₩7,463.60 |
| 250 - 975 | ₩293.28 | ₩7,313.20 |
| 1000 + | ₩287.64 | ₩7,181.60 |
* 참고 가격: 실제 구매가격과 다를 수 있습니다
- RS 제품 번호:
- 240-1725
- 제조사 부품 번호:
- 74AUP1T08GW-Q100H
- 제조업체:
- Nexperia
사양
참조 문서
제정법과 컴플라이언스
제품 세부 사항
제품 정보를 선택해 유사 제품을 찾기
모두 선택 | 제품 정보 | 값 |
|---|---|---|
| 브랜드 | Nexperia | |
| Product Type | Logic Gate | |
| Logic Function | AND | |
| Mount Type | Surface | |
| Number of Inputs per Gate | 2 | |
| Schmitt Trigger Input | Yes | |
| Package Type | TSSOP-5 | |
| Pin Count | 5 | |
| Logic Family | AUP | |
| Minimum Operating Temperature | -40°C | |
| Maximum Propagation Delay Time @ CL | 4.8ns | |
| Maximum High Level Output Current | -4mA | |
| Maximum Operating Temperature | 125°C | |
| Height | 1.1mm | |
| Standards/Approvals | No | |
| Minimum Supply Voltage | 2.3V | |
| Maximum Supply Voltage | 3.6V | |
| Width | 1.35 mm | |
| Length | 2.25mm | |
| Maximum Low Level Output Current | 4mA | |
| Automotive Standard | AEC-Q100 | |
| 모두 선택 | ||
|---|---|---|
브랜드 Nexperia | ||
Product Type Logic Gate | ||
Logic Function AND | ||
Mount Type Surface | ||
Number of Inputs per Gate 2 | ||
Schmitt Trigger Input Yes | ||
Package Type TSSOP-5 | ||
Pin Count 5 | ||
Logic Family AUP | ||
Minimum Operating Temperature -40°C | ||
Maximum Propagation Delay Time @ CL 4.8ns | ||
Maximum High Level Output Current -4mA | ||
Maximum Operating Temperature 125°C | ||
Height 1.1mm | ||
Standards/Approvals No | ||
Minimum Supply Voltage 2.3V | ||
Maximum Supply Voltage 3.6V | ||
Width 1.35 mm | ||
Length 2.25mm | ||
Maximum Low Level Output Current 4mA | ||
Automotive Standard AEC-Q100 | ||
The Nexperia low-power 2 input AND gate with voltage-level translator provides the single 2-input AND function. This device ensures a very low static and dynamic power consumption across the entire VCC range from 2.3 V to 3.6 V. It is designed for logic-l
Low static power consumption; ICC1.5 μA (maximum)
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of VCC
IOFF circuitry provides partial power-down mode operation
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