Renesas Electronics 74FCT573CTSOG 8-Bit Octal D Type Latch, Transparent, CMOS, 20-Pin SOIC
- RS 제품 번호:
- 263-7966
- 제조사 부품 번호:
- 74FCT573CTSOG
- 제조업체:
- Renesas Electronics
본 이미지는 참조용이오니 재확인이 필요하시면 문의해주세요.
대량 구매 할인 기용 가능
Subtotal (1 pack of 5 units)*
₩7,527.00
현재 액세스할 수 없는 재고 정보 - 나중에 다시 확인해 주세요.
수량 | 한팩당 | 한팩당* |
|---|---|---|
| 5 - 5 | ₩1,505.40 | ₩7,527.00 |
| 10 - 20 | ₩1,357.20 | ₩6,786.00 |
| 25 - 105 | ₩1,287.00 | ₩6,435.00 |
| 110 + | ₩1,263.60 | ₩6,318.00 |
* 참고 가격: 실제 구매가격과 다를 수 있습니다
- RS 제품 번호:
- 263-7966
- 제조사 부품 번호:
- 74FCT573CTSOG
- 제조업체:
- Renesas Electronics
사양
참조 문서
제정법과 컴플라이언스
제품 세부 사항
제품 정보를 선택해 유사 제품을 찾기
모두 선택 | 제품 정보 | 값 |
|---|---|---|
| 브랜드 | Renesas Electronics | |
| Logic Family | 74FCT | |
| Product Type | Octal D Type Latch | |
| Latch Mode | Transparent | |
| Logic Function | D Type | |
| Number of Bits | 8 | |
| Number of Channels | 20 | |
| Output Type | CMOS | |
| Package Type | SOIC | |
| Pin Count | 20 | |
| Minimum Operating Temperature | -40°C | |
| Maximum Propagation Delay Time @ CL | 4.2ns | |
| Maximum Operating Temperature | 85°C | |
| Standards/Approvals | No | |
| Automotive Standard | No | |
| 모두 선택 | ||
|---|---|---|
브랜드 Renesas Electronics | ||
Logic Family 74FCT | ||
Product Type Octal D Type Latch | ||
Latch Mode Transparent | ||
Logic Function D Type | ||
Number of Bits 8 | ||
Number of Channels 20 | ||
Output Type CMOS | ||
Package Type SOIC | ||
Pin Count 20 | ||
Minimum Operating Temperature -40°C | ||
Maximum Propagation Delay Time @ CL 4.2ns | ||
Maximum Operating Temperature 85°C | ||
Standards/Approvals No | ||
Automotive Standard No | ||
The Renesas Electronics octal transparent latch built using an advanced dual metal CMOS technology. These octal latches have 3-state outputs and are intended for bus oriented applications. The flip-flops appear transparent to the data when latch enable is high. When LE is low, the data that meets the set-up time is latched. Data appears on the bus when the output enable is low. When OE is high, the bus output is in the high-impedance state.
Low input and output leakage ≤1μA
CMOS power levels
High drive outputs
Power off disable outputs permit live insertion
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