Nexperia 74LVC573APW,118 8-Bit Octal D Type Latch, Transparent, 3 State, 20-Pin TSSOP
- RS 제품 번호:
- 170-5424
- 제조사 부품 번호:
- 74LVC573APW,118
- 제조업체:
- Nexperia
본 이미지는 참조용이오니 재확인이 필요하시면 문의해주세요.
대량 구매 할인 기용 가능
Subtotal (1 pack of 25 units)*
₩8,601.00
일시적 품절
- 2026년 8월 28일 부터 배송
더 자세한 내용이 필요하신가요? 필요한 수량을 입력하고 '배송일 확인'을 클릭하면 더 많은 재고 및 배송 세부정보를 확인하실 수 있습니다.
수량 | 한팩당 | 한팩당* |
|---|---|---|
| 25 - 600 | ₩344.04 | ₩8,610.40 |
| 625 - 1225 | ₩334.64 | ₩8,384.80 |
| 1250 + | ₩330.88 | ₩8,253.20 |
* 참고 가격: 실제 구매가격과 다를 수 있습니다
- RS 제품 번호:
- 170-5424
- 제조사 부품 번호:
- 74LVC573APW,118
- 제조업체:
- Nexperia
사양
참조 문서
제정법과 컴플라이언스
제품 세부 사항
제품 정보를 선택해 유사 제품을 찾기
모두 선택 | 제품 정보 | 값 |
|---|---|---|
| 브랜드 | Nexperia | |
| Logic Family | 74LVC | |
| Product Type | Octal D Type Latch | |
| Logic Function | D Type | |
| Latch Mode | Transparent | |
| Number of Bits | 8 | |
| Number of Channels | 8 | |
| Output Type | 3 State | |
| Polarity | Non-Inverting | |
| Mount Type | Surface | |
| Package Type | TSSOP | |
| Minimum Supply Voltage | 1.2V | |
| Maximum Supply Voltage | 3.6V | |
| Pin Count | 20 | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 125°C | |
| Height | 0.95mm | |
| Width | 4.5 mm | |
| Standards/Approvals | No | |
| Length | 6.6mm | |
| Series | 74LVC | |
| Automotive Standard | No | |
| 모두 선택 | ||
|---|---|---|
브랜드 Nexperia | ||
Logic Family 74LVC | ||
Product Type Octal D Type Latch | ||
Logic Function D Type | ||
Latch Mode Transparent | ||
Number of Bits 8 | ||
Number of Channels 8 | ||
Output Type 3 State | ||
Polarity Non-Inverting | ||
Mount Type Surface | ||
Package Type TSSOP | ||
Minimum Supply Voltage 1.2V | ||
Maximum Supply Voltage 3.6V | ||
Pin Count 20 | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 125°C | ||
Height 0.95mm | ||
Width 4.5 mm | ||
Standards/Approvals No | ||
Length 6.6mm | ||
Series 74LVC | ||
Automotive Standard No | ||
- COO (Country of Origin):
- CN
The 74LVC573A consists of eight D-type transparent latches, featuring separate D-type inputs for each latch and 3-state true outputs for bus-oriented applications. A Latch Enable (LE) input and an Output Enable (OE) input are common to all internal latches. When LE is HIGH, data at the Dn inputs enters the latches. In this condition, the latches are transparent, that is, a latch output will change each time its corresponding D-input changes.
Mixed 5 V and 3.3 V applications
Save board space
Low cost Interface solutions
Improved signal integrity for complex layouts
Wide supply voltage range
Low propagation delay
Overvoltage tolerant
Source termination
Low input threshold
CMOS low power
Memory controllers
Backplane interfaces
관련된 링크들
- Nexperia 8-Bit Octal D Type Latch, Transparent, 3 State, 20-Pin TSSOP
- Nexperia 74HC573PW,118 8-Bit Octal D Type Latch, Transparent, 3 State, 20-Pin TSSOP-20
- Toshiba 74VHC573FT 8-Bit Octal D Type Latch, Transparent, 20-Pin TSSOP
- Toshiba 74LCX573FT 8-Bit Octal D Type Latch, Transparent, CMOS, 20-Pin TSSOP
- Nexperia 8-Bit Octal D Type Latch, Transparent, 3 State, 20-Pin TSSOP-20
- Texas Instruments SN74LVC573APWR 8-Bit Latch, Transparent, 3 State, 20-Pin TSSOP
- Nexperia 74LVC138APW,118, Decoder, 16-Pin TSSOP
- Toshiba 8-Bit Octal D Type Latch, Transparent, 20-Pin TSSOP
