Renesas Electronics 74FCT543ATQG 8-Bit Octal D Type Latch, Transparent, 3 State, 24-Pin
- RS 제품 번호:
- 263-7964
- 제조사 부품 번호:
- 74FCT543ATQG
- 제조업체:
- Renesas Electronics
본 이미지는 참조용이오니 재확인이 필요하시면 문의해주세요.
대량 구매 할인 기용 가능
Subtotal (1 pack of 10 units)*
₩10,081.50
현재 액세스할 수 없는 재고 정보 - 나중에 다시 확인해 주세요.
수량 | 한팩당 | 한팩당* |
|---|---|---|
| 10 - 10 | ₩1,008.15 | ₩10,081.50 |
| 20 - 20 | ₩986.70 | ₩9,867.00 |
| 30 - 100 | ₩955.50 | ₩9,555.00 |
| 110 - 270 | ₩936.00 | ₩9,360.00 |
| 280 + | ₩916.50 | ₩9,165.00 |
* 참고 가격: 실제 구매가격과 다를 수 있습니다
- RS 제품 번호:
- 263-7964
- 제조사 부품 번호:
- 74FCT543ATQG
- 제조업체:
- Renesas Electronics
사양
참조 문서
제정법과 컴플라이언스
제품 세부 사항
제품 정보를 선택해 유사 제품을 찾기
모두 선택 | 제품 정보 | 값 |
|---|---|---|
| 브랜드 | Renesas Electronics | |
| Product Type | Octal D Type Latch | |
| Logic Family | 74FCT | |
| Logic Function | D Type | |
| Latch Mode | Transparent | |
| Number of Bits | 8 | |
| Number of Channels | 14 | |
| Output Type | 3 State | |
| Polarity | Non-Inverting | |
| Minimum Supply Voltage | -0.5V | |
| Maximum Supply Voltage | 7V | |
| Pin Count | 24 | |
| Minimum Operating Temperature | -40°C | |
| Maximum Propagation Delay Time @ CL | 8ns | |
| Maximum Operating Temperature | 85°C | |
| Standards/Approvals | JEDEC standard 18 | |
| Series | 74FCT543AT/CT | |
| Automotive Standard | No | |
| 모두 선택 | ||
|---|---|---|
브랜드 Renesas Electronics | ||
Product Type Octal D Type Latch | ||
Logic Family 74FCT | ||
Logic Function D Type | ||
Latch Mode Transparent | ||
Number of Bits 8 | ||
Number of Channels 14 | ||
Output Type 3 State | ||
Polarity Non-Inverting | ||
Minimum Supply Voltage -0.5V | ||
Maximum Supply Voltage 7V | ||
Pin Count 24 | ||
Minimum Operating Temperature -40°C | ||
Maximum Propagation Delay Time @ CL 8ns | ||
Maximum Operating Temperature 85°C | ||
Standards/Approvals JEDEC standard 18 | ||
Series 74FCT543AT/CT | ||
Automotive Standard No | ||
- COO (Country of Origin):
- MY
The Renesas Electronics octal latch transceiver is a non-inverting octal transceiver built using an Advanced dual metal CMOS technology. This device contains two sets of eight D-type latches with separate input and output controls for each set.
Low input and output leakage ≤1μA
CMOS power levels
Power off disable outputs permit live insertion
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