Renesas Electronics 74FCT3807PYGI PLL Clock Driver, 20-Pin 10 SSOP
- RS 제품 번호:
- 263-7956
- 제조사 부품 번호:
- 74FCT3807PYGI
- 제조업체:
- Renesas Electronics
본 이미지는 참조용이오니 재확인이 필요하시면 문의해주세요.
대량 구매 할인 기용 가능
Subtotal (1 pack of 5 units)*
₩9,832.40
재고있음
- 380 개 단위 배송 준비 완료
더 자세한 내용이 필요하신가요? 필요한 수량을 입력하고 '배송일 확인'을 클릭하면 더 많은 재고 및 배송 세부정보를 확인하실 수 있습니다.
수량 | 한팩당 | 한팩당* |
|---|---|---|
| 5 - 5 | ₩1,966.48 | ₩9,832.40 |
| 10 - 20 | ₩1,767.20 | ₩8,836.00 |
| 25 - 95 | ₩1,658.16 | ₩8,290.80 |
| 100 - 250 | ₩1,413.76 | ₩7,068.80 |
| 255 + | ₩1,387.44 | ₩6,937.20 |
* 참고 가격: 실제 구매가격과 다를 수 있습니다
- RS 제품 번호:
- 263-7956
- 제조사 부품 번호:
- 74FCT3807PYGI
- 제조업체:
- Renesas Electronics
사양
참조 문서
제정법과 컴플라이언스
제품 세부 사항
제품 정보를 선택해 유사 제품을 찾기
모두 선택 | 제품 정보 | 값 |
|---|---|---|
| 브랜드 | Renesas Electronics | |
| Product Type | PLL Clock Driver | |
| Mount Type | Surface | |
| Package Type | SSOP | |
| Minimum Supply Voltage | -0.5V | |
| Pin Count | 20 | |
| Maximum Supply Voltage | 4.6V | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 85°C | |
| Length | 12.8mm | |
| Height | 2.34mm | |
| Width | 7.6 mm | |
| Standards/Approvals | RoHS | |
| Series | 74FCT3807A | |
| Automotive Standard | No | |
| Maximum Output Frequency | 133.33Hz | |
| Number of Outputs | 10 | |
| 모두 선택 | ||
|---|---|---|
브랜드 Renesas Electronics | ||
Product Type PLL Clock Driver | ||
Mount Type Surface | ||
Package Type SSOP | ||
Minimum Supply Voltage -0.5V | ||
Pin Count 20 | ||
Maximum Supply Voltage 4.6V | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 85°C | ||
Length 12.8mm | ||
Height 2.34mm | ||
Width 7.6 mm | ||
Standards/Approvals RoHS | ||
Series 74FCT3807A | ||
Automotive Standard No | ||
Maximum Output Frequency 133.33Hz | ||
Number of Outputs 10 | ||
- COO (Country of Origin):
- MY
The Renesas Electronics clock driver is built using advanced dual metal CMOS technology. This low skew clock driver offers 1:10 fan out. The large fan out from a single input reduces loading on the preceding driver and provides an efficient clock distribution network. It offers low capacitance inputs with hysteresis for improved noise margins. Multiple power and grounds reduce noise. Typical applications are clock and signal distribution.
Guaranteed low skew < 500ps
Very low duty cycle distortion < 1.0ns
Very low CMOS power levels
TTL compatible inputs and outputs
Two independent output banks with 3-state control
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