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onsemi MC100EPT25DG, Logic Level Translator Translator 2 ECL to LVTTL, 8-Pin SOIC

RS 제품 번호:: 186-9227
제조사 부품 번호:: MC100EPT25DG
제조업체:: onsemi

onsemi MC100EPT25DG, Logic Level Translator Translator 2 ECL to LVTTL, 8-Pin SOIC

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Subtotal (1 unit)*

₩14,269.20

재고있음

추가로 2026년 2월 23일 부터 1,676 개 단위 배송

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수량	한팩당
1 - 24	₩14,269.20
25 - 48	₩13,893.20
49 +	₩13,686.40

* 참고 가격: 실제 구매가격과 다를 수 있습니다

RS 제품 번호:: 186-9227
제조사 부품 번호:: MC100EPT25DG
제조업체:: onsemi

참조 문서

제정법과 컴플라이언스

제품 세부 사항

제품 정보를 선택해 유사 제품을 찾기

모두 선택	제품 정보	값
	브랜드	onsemi
	Logic Family	ECL
	Product Type	Logic Level Translator
	Direction Type	Uni-Directional
	Maximum Propagation Delay Time @ CL	2ns
	Mount Type	Surface
	Number of Elements per Chip	2
	Package Type	SOIC
	Pin Count	8
	Output Type	LVTTL
	Logic Function	Translator
	Maximum Low Level Output Current	24mA
	Maximum High Level Output Current	-3mA
	Minimum Supply Voltage	3V
	Maximum Supply Voltage	3.6V
	Translation	ECL to LVTTL
	Minimum Operating Temperature	-40°C
	Maximum Operating Temperature	85°C
	Length	5mm
	Height	1.5mm
	Series	MC100EPT2
	Width	4 mm
	Standards/Approvals	No
	Automotive Standard	No

	모두 선택
	브랜드 onsemi
	Logic Family ECL
	Product Type Logic Level Translator
	Direction Type Uni-Directional
	Maximum Propagation Delay Time @ CL 2ns
	Mount Type Surface
	Number of Elements per Chip 2
	Package Type SOIC
	Pin Count 8
	Output Type LVTTL
	Logic Function Translator
	Maximum Low Level Output Current 24mA
	Maximum High Level Output Current -3mA
	Minimum Supply Voltage 3V
	Maximum Supply Voltage 3.6V
	Translation ECL to LVTTL
	Minimum Operating Temperature -40°C
	Maximum Operating Temperature 85°C
	Length 5mm
	Height 1.5mm
	Series MC100EPT2
	Width 4 mm
	Standards/Approvals No
	Automotive Standard No

Datasheet

The MC100EPT25 is a Differential LVECL/ECL to LVTTL translator. This device requires +3.3V, -3.3V to -5.2V, and ground. The small outline 8-lead SOIC package and the single gate of the EPT25 make it ideal for applications which require the translation of a clock or data signal.

The VBB output allows the EPT25 to also be used in a single-ended input mode. In this mode the VBB output is tied to the D input for a inverting buffer or the D input for a non-inverting buffer. If used, the VBB pin should be bypassed to ground with at least a 0.01 μF capacitor.

1.1ns Typical Propagation Delay

Maximum Frequency > 275 MHz Typical

Operating Range: VCC = 3.0 V to 3.6 V, VEE = -5.5 V to -3.0 V, GND = 0 V

24mA TTL outputs

Q Output will default LOW with inputs open or at GND

VBB Output

Open Input Default State

Safety Clamp on Inputs

Pb-Free Packages are Available

onsemi MC100EPT25DG, Logic Level Translator Translator 2 ECL to LVTTL, 8-Pin SOIC

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