onsemi MC100EPT25DG, Logic Level Translator Translator ECL to LVTTL, 8-Pin SOIC-NB

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Subtotal (1 tube of 98 units)*

₩1,168,818.56

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한팩당
Per Tube*
98 - 98₩11,926.72₩1,168,780.96
196 - 294₩11,687.96₩1,145,382.48
392 +₩11,454.84₩1,122,501.00

* 참고 가격: 실제 구매가격과 다를 수 있습니다

RS 제품 번호:
186-8831
제조사 부품 번호:
MC100EPT25DG
제조업체:
onsemi
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모두 선택

브랜드

onsemi

Logic Family

ECL

Mounting Type

Surface Mount

Package Type

SOIC-NB

Pin Count

8

Output Type

LVTTL

Dimensions

5 x 4 x 1.5mm

Logic Function

Translator

Maximum Low Level Output Current

24mA

Maximum High Level Output Current

-3mA

Translation

ECL to LVTTL

Propagation Delay Test Condition

20pF

Maximum Operating Supply Voltage

3.6 V

Maximum Propagation Delay Time @ Maximum CL

1600 ps @ 20 pF

Maximum Operating Temperature

+85 °C

Minimum Operating Supply Voltage

3 V

Minimum Operating Temperature

-40 °C

The MC100EPT25 is a Differential LVECL/ECL to LVTTL translator. This device requires +3.3V, -3.3V to -5.2V, and ground. The small outline 8-lead SOIC package and the single gate of the EPT25 make it ideal for applications which require the translation of a clock or data signal.
The VBB output allows the EPT25 to also be used in a single-ended input mode. In this mode the VBB output is tied to the D input for a inverting buffer or the D input for a non-inverting buffer. If used, the VBB pin should be bypassed to ground with at least a 0.01 μF capacitor.

1.1ns Typical Propagation Delay
Maximum Frequency > 275 MHz Typical
Operating Range: VCC = 3.0 V to 3.6 V, VEE = -5.5 V to -3.0 V, GND = 0 V
24mA TTL outputs
Q Output will default LOW with inputs open or at GND
VBB Output
Open Input Default State
Safety Clamp on Inputs
Pb-Free Packages are Available

For these non-cancellable (NC), and non-returnable (NR) products, Terms and Conditions apply.


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