onsemi, Logic Level Translator Translator 2 ECL to LVTTL, 8-Pin SOIC

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Subtotal (1 tube of 98 units)*

₩1,291,522.40

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한팩당
Per Tube*
98 - 98₩13,178.80₩1,291,449.08
196 - 294₩12,913.72₩1,265,599.08
392 +₩12,656.16₩1,240,303.68

* 참고 가격: 실제 구매가격과 다를 수 있습니다

RS 제품 번호:
186-8831
제조사 부품 번호:
MC100EPT25DG
제조업체:
onsemi
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브랜드

onsemi

Direction Type

Uni-Directional

Product Type

Logic Level Translator

Logic Family

ECL

Maximum Propagation Delay Time @ CL

2ns

Mount Type

Surface

Package Type

SOIC

Number of Elements per Chip

2

Output Type

LVTTL

Pin Count

8

Logic Function

Translator

Maximum Low Level Output Current

24mA

Minimum Supply Voltage

3V

Maximum High Level Output Current

-3mA

Maximum Supply Voltage

3.6V

Translation

ECL to LVTTL

Minimum Operating Temperature

-40°C

Maximum Operating Temperature

85°C

Series

MC100EPT2

Length

5mm

Height

1.5mm

Standards/Approvals

No

Width

4 mm

Automotive Standard

No

The MC100EPT25 is a Differential LVECL/ECL to LVTTL translator. This device requires +3.3V, -3.3V to -5.2V, and ground. The small outline 8-lead SOIC package and the single gate of the EPT25 make it ideal for applications which require the translation of a clock or data signal.

The VBB output allows the EPT25 to also be used in a single-ended input mode. In this mode the VBB output is tied to the D input for a inverting buffer or the D input for a non-inverting buffer. If used, the VBB pin should be bypassed to ground with at least a 0.01 μF capacitor.

1.1ns Typical Propagation Delay

Maximum Frequency > 275 MHz Typical

Operating Range: VCC = 3.0 V to 3.6 V, VEE = -5.5 V to -3.0 V, GND = 0 V

24mA TTL outputs

Q Output will default LOW with inputs open or at GND

VBB Output

Open Input Default State

Safety Clamp on Inputs

Pb-Free Packages are Available

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