Renesas Electronics SRAM- 16 kB
- RS 제품 번호:
- 217-3676
- 제조사 부품 번호:
- 71321LA55PPGI
- 제조업체:
- Renesas Electronics
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- RS 제품 번호:
- 217-3676
- 제조사 부품 번호:
- 71321LA55PPGI
- 제조업체:
- Renesas Electronics
사양
참조 문서
제정법과 컴플라이언스
제품 세부 사항
제품 정보를 선택해 유사 제품을 찾기
모두 선택 | 제품 정보 | 값 |
|---|---|---|
| 브랜드 | Renesas Electronics | |
| Product Type | SRAM | |
| Memory Size | 16kB | |
| Organisation | 2K x 8 bit | |
| Number of Words | 2k | |
| Number of Bits per Word | 8 | |
| Maximum Random Access Time | 55ns | |
| Address Bus Width | 16bit | |
| Minimum Supply Voltage | 4.5V | |
| Timing Type | Asynchronous | |
| Mount Type | Surface | |
| Maximum Supply Voltage | 5.5V | |
| Package Type | TQFP | |
| Minimum Operating Temperature | -40°C | |
| Pin Count | 52 | |
| Maximum Operating Temperature | 85°C | |
| Length | 10mm | |
| Series | 71321 | |
| Standards/Approvals | No | |
| Height | 1.4mm | |
| Width | 10 mm | |
| Automotive Standard | No | |
| Supply Current | 65mA | |
| 모두 선택 | ||
|---|---|---|
브랜드 Renesas Electronics | ||
Product Type SRAM | ||
Memory Size 16kB | ||
Organisation 2K x 8 bit | ||
Number of Words 2k | ||
Number of Bits per Word 8 | ||
Maximum Random Access Time 55ns | ||
Address Bus Width 16bit | ||
Minimum Supply Voltage 4.5V | ||
Timing Type Asynchronous | ||
Mount Type Surface | ||
Maximum Supply Voltage 5.5V | ||
Package Type TQFP | ||
Minimum Operating Temperature -40°C | ||
Pin Count 52 | ||
Maximum Operating Temperature 85°C | ||
Length 10mm | ||
Series 71321 | ||
Standards/Approvals No | ||
Height 1.4mm | ||
Width 10 mm | ||
Automotive Standard No | ||
Supply Current 65mA | ||
The Renesas Electronics 71321 series high-speed 2K x 8 Dual-Port Static RAM with internal interrupt logic for interprocessor communications. It is designed to be used as a stand-alone 8-bit Dual-Port RAM or as a "MASTER" Dual-Port RAM. It has 52 lead count and has TQFP package. The SRAM has I temperature grade.
Two INT flags for port-to-port communications
Easily expands data bus width to 16-or more- bits using SLAVE 71421
On-chip port arbitration logic
BUSY output flag
Fully asynchronous operation from either port