ISSI IS42S16400J-7TLI SDRAM 64 MB Surface, 54-Pin 16 bit TSOP
- RS 제품 번호:
- 811-5125P
- 제조사 부품 번호:
- IS42S16400J-7TLI
- 제조업체:
- ISSI
현재 비가용
RS는 이 제품을 더 이상 판매하지 않습니다.
- RS 제품 번호:
- 811-5125P
- 제조사 부품 번호:
- IS42S16400J-7TLI
- 제조업체:
- ISSI
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모두 선택 | 제품 정보 | 값 |
|---|---|---|
| 브랜드 | ISSI | |
| Memory Size | 64MB | |
| Product Type | SDRAM | |
| Organisation | 4M x 16 bit | |
| Data Bus Width | 16bit | |
| Address Bus Width | 14bit | |
| Maximum Clock Frequency | 200MHz | |
| Number of Bits per Word | 16 | |
| Maximum Random Access Time | 5.4ns | |
| Number of Words | 4M | |
| Mount Type | Surface | |
| Package Type | TSOP | |
| Pin Count | 54 | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 85°C | |
| Series | IS42S16400J | |
| Width | 10.29mm | |
| Height | 1.05mm | |
| Length | 22.42mm | |
| Standards/Approvals | No | |
| Automotive Standard | No | |
| Minimum Supply Voltage | 3V | |
| Maximum Supply Voltage | 3.6V | |
| 모두 선택 | ||
|---|---|---|
브랜드 ISSI | ||
Memory Size 64MB | ||
Product Type SDRAM | ||
Organisation 4M x 16 bit | ||
Data Bus Width 16bit | ||
Address Bus Width 14bit | ||
Maximum Clock Frequency 200MHz | ||
Number of Bits per Word 16 | ||
Maximum Random Access Time 5.4ns | ||
Number of Words 4M | ||
Mount Type Surface | ||
Package Type TSOP | ||
Pin Count 54 | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 85°C | ||
Series IS42S16400J | ||
Width 10.29mm | ||
Height 1.05mm | ||
Length 22.42mm | ||
Standards/Approvals No | ||
Automotive Standard No | ||
Minimum Supply Voltage 3V | ||
Maximum Supply Voltage 3.6V | ||
Dynamic RAM, ISSI
ISSI SDR SDRAM range offers synchronous interface with programmable CAS Latency (2/3 clocks). High speed data transfer is achieved using the pipeline process and the Synchronous DRAM SDR series offer burst read/write and burst read/single write making them ideally for use in computers applications. ISSIs SDR SDRAM devices come in a range of different organisations and memory sizes, operating on a 3.3V power supply.
LVTTL interface
Input/output signals refer to the rising edge of the clock input
Programmable burst sequence: Sequential/Interleave; Programmable burst length
Random column address every clock cycle
Self-refresh and Auto Refresh mode
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