Nexperia 74HC273D,653 8-Bit Latch, Addressable, D Type Flip-Flop, 20-Pin SO
- RS 제품 번호:
- 170-7978
- 제조사 부품 번호:
- 74HC273D,653
- 제조업체:
- Nexperia
대량 구매 할인 기용 가능
Subtotal (1 reel of 2000 units)*
₩857,280.00
일시적 품절
- 2026년 8월 28일 부터 배송
더 자세한 내용이 필요하신가요? 필요한 수량을 입력하고 '배송일 확인'을 클릭하면 더 많은 재고 및 배송 세부정보를 확인하실 수 있습니다.
수량 | 한팩당 | 릴당* |
|---|---|---|
| 2000 - 8000 | ₩428.64 | ₩858,032.00 |
| 10000 + | ₩421.12 | ₩841,112.00 |
* 참고 가격: 실제 구매가격과 다를 수 있습니다
- RS 제품 번호:
- 170-7978
- 제조사 부품 번호:
- 74HC273D,653
- 제조업체:
- Nexperia
사양
참조 문서
제정법과 컴플라이언스
제품 세부 사항
제품 정보를 선택해 유사 제품을 찾기
모두 선택 | 제품 정보 | 값 |
|---|---|---|
| 브랜드 | Nexperia | |
| Product Type | Latch | |
| Logic Family | 74HC | |
| Logic Function | D Type | |
| Latch Mode | Addressable | |
| Number of Bits | 8 | |
| Output Type | D Type Flip-Flop | |
| Polarity | Non-Inverting | |
| Mount Type | Surface | |
| Package Type | SO | |
| Minimum Supply Voltage | 2V | |
| Pin Count | 20 | |
| Maximum Supply Voltage | 6V | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 125°C | |
| Standards/Approvals | No | |
| Series | 74HC | |
| Width | 7.6 mm | |
| Height | 2.45mm | |
| Length | 13mm | |
| Automotive Standard | No | |
| 모두 선택 | ||
|---|---|---|
브랜드 Nexperia | ||
Product Type Latch | ||
Logic Family 74HC | ||
Logic Function D Type | ||
Latch Mode Addressable | ||
Number of Bits 8 | ||
Output Type D Type Flip-Flop | ||
Polarity Non-Inverting | ||
Mount Type Surface | ||
Package Type SO | ||
Minimum Supply Voltage 2V | ||
Pin Count 20 | ||
Maximum Supply Voltage 6V | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 125°C | ||
Standards/Approvals No | ||
Series 74HC | ||
Width 7.6 mm | ||
Height 2.45mm | ||
Length 13mm | ||
Automotive Standard No | ||
The 74HC273, 74HCT273 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and master reset (MR) inputs. The outputs Qn will assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A LOW on MR forces the outputs LOW independently of clock and data inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
Mixed 5 V and 3.3 V applications
Improved signal integrity with integrated termination resistors
High noise immunity
Flow through pin out for easy layout
Wide supply voltage range
Low propagation delay
Overvoltage tolerant input options
Integrated source termination resistor options
Bus hold options
Key applications
Frequency division
Controlled delays
Interface between asynchronous and synchronous systems
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