Digilent 410-299 Programming Cable for use with Xilinx Tool, JTAG-HS3
- RS 제품 번호:
- 134-6435
- Distrelec 제품 번호:
- 300-44-265
- 제조사 부품 번호:
- 410-299
- 제조업체:
- Digilent
대량 구매 할인 기용 가능
Subtotal (1 unit)*
₩88,886.40
재고있음
- 41 개 단위 배송 준비 완료
더 자세한 내용이 필요하신가요? 필요한 수량을 입력하고 '배송일 확인'을 클릭하면 더 많은 재고 및 배송 세부정보를 확인하실 수 있습니다.
수량 | 한팩당 |
|---|---|
| 1 - 4 | ₩88,886.40 |
| 5 + | ₩87,119.20 |
* 참고 가격: 실제 구매가격과 다를 수 있습니다
- RS 제품 번호:
- 134-6435
- Distrelec 제품 번호:
- 300-44-265
- 제조사 부품 번호:
- 410-299
- 제조업체:
- Digilent
사양
참조 문서
제정법과 컴플라이언스
제품 세부 사항
제품 정보를 선택해 유사 제품을 찾기
모두 선택 | 제품 정보 | 값 |
|---|---|---|
| 브랜드 | Digilent | |
| Product Type | Development Kit Accessory | |
| Accessory Type | Programming Cable | |
| For Use With | Xilinx Tool, JTAG-HS3 | |
| Standards/Approvals | No | |
| Distrelec Product Id | 30044265 | |
| 모두 선택 | ||
|---|---|---|
브랜드 Digilent | ||
Product Type Development Kit Accessory | ||
Accessory Type Programming Cable | ||
For Use With Xilinx Tool, JTAG-HS3 | ||
Standards/Approvals No | ||
Distrelec Product Id 30044265 | ||
JTAG-HS3 FPGA Programming Cable
The JTAG-HS3 programming cable allows high-speed programming/debugging of Xilinx FPGA and SoC devices from a host PC.
Features
• Separate Vref drives JTAG signal voltages
• Vref can be any voltage between +1.8V and +5V
• USB 2.0 HS port drives JTAG bus at up to 30Mbit/sec
• Compatible with Xilinx ISE 14.1 and newer
• Compatible with Xilinx Vivado 2013.3 and newer
• PC connector: MicroUSB
• JTAG connector: 2 x 7-pin 2mm
• Open-drain buffer on pin 14 allows processor reset of Xilinx Zynq platform
Supported Target Devices
• Xilinx FPGAs;• Xilinx Zynq-7000;• Xilinx CoolRunner™/CoolRunner-II CPLDs;• Xilinx Platform Flash ISP configuration PROMs;• Selected third-party SPI PROMs;• Selected third-party BPI PROMs
Target Devices Not Supported
• Xilinx 9500/9500XL CPLDs;• Xilinx 1700 and 18V00 ISP configuration PROMs;• Xilinx FPGA eFUSE programming
An FPGA is a semiconductor device consisting of a matrix of Configurable Logic Blocks (CLBs) connected through programmable interconnects. The user determines these interconnections by programming SRAM. A CLB can be simple (AND, OR gates, etc) or complex (a block of RAM). The FPGA allows changes to be made to a design even after the device is soldered into a PCB.
Note
This cable is not needed for Digilent Xilinx FPGA boards as they have this functionality built-in.
Supplied with
USB cable
관련된 링크들
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- Digilent 410-383-5EV Zynq Ultrascale+ MPSoC Development Board Development Board Xilinx Zynq UltraScale+ MPSoC EV Device
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