Nexperia 74HCT4094D,118 8-stage Surface Mount Shift Register 74HCT, 16-Pin SOIC
- RS 제품 번호:
- 170-8030
- 제조사 부품 번호:
- 74HCT4094D,118
- 제조업체:
- Nexperia
대량 구매 할인 기용 가능
Subtotal (1 reel of 2500 units)*
₩752,000.00
일시적 품절
- 2026년 8월 03일 부터 배송
더 자세한 내용이 필요하신가요? 필요한 수량을 입력하고 '배송일 확인'을 클릭하면 더 많은 재고 및 배송 세부정보를 확인하실 수 있습니다.
수량 | 한팩당 | 릴당* |
|---|---|---|
| 2500 - 10000 | ₩300.80 | ₩750,120.00 |
| 12500 + | ₩293.28 | ₩735,080.00 |
* 참고 가격: 실제 구매가격과 다를 수 있습니다
- RS 제품 번호:
- 170-8030
- 제조사 부품 번호:
- 74HCT4094D,118
- 제조업체:
- Nexperia
사양
참조 문서
제정법과 컴플라이언스
제품 세부 사항
제품 정보를 선택해 유사 제품을 찾기
모두 선택 | 제품 정보 | 값 |
|---|---|---|
| 브랜드 | Nexperia | |
| Package Type | SO | |
| Number of Stages | 8 | |
| Logic Family | 74HCT | |
| Mounting Type | Surface Mount | |
| Operation Mode | Serial to Serial, Parallel | |
| Number of Elements | 1 | |
| Pin Count | 16 | |
| Minimum Operating Supply Voltage | 4.5 V | |
| Maximum Operating Supply Voltage | 5.5 V | |
| Dimensions | 10 x 4 x 1.45mm | |
| Triggering Type | Positive Edge | |
| Minimum Operating Temperature | -40 °C | |
| Direction Type | Uni-Directional | |
| Maximum Operating Temperature | 125 °C | |
| 모두 선택 | ||
|---|---|---|
브랜드 Nexperia | ||
Package Type SO | ||
Number of Stages 8 | ||
Logic Family 74HCT | ||
Mounting Type Surface Mount | ||
Operation Mode Serial to Serial, Parallel | ||
Number of Elements 1 | ||
Pin Count 16 | ||
Minimum Operating Supply Voltage 4.5 V | ||
Maximum Operating Supply Voltage 5.5 V | ||
Dimensions 10 x 4 x 1.45mm | ||
Triggering Type Positive Edge | ||
Minimum Operating Temperature -40 °C | ||
Direction Type Uni-Directional | ||
Maximum Operating Temperature 125 °C | ||
The 74HC4094, 74HCT4094 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (D) and two serial outputs (QS1 and QS2) to enable cascading. Data is shifted on the LOW-to-HIGH transitions of the CP input. Data is available at QS1 on the LOW-to-HIGH transitions of the CP input to allow cascading when clock edges are fast. The same data is available at QS2 on the next HIGH-to-LOW transition of the CP input to allow cascading when clock edges are slow. The data in the shift register is transferred to the storage register when the STR input is HIGH. Data in the storage register appears at the outputs whenever the output enable input (OE) is HIGH.
Simple control interface
I/O expansion
Asynchronous and synchronous load options
High frequency
Cascadable
LED drivers
Key applications
Displays
Control units
I/O expansion
Asynchronous and synchronous load options
High frequency
Cascadable
LED drivers
Key applications
Displays
Control units
For these non-cancellable (NC), and non-returnable (NR) products, Terms and Conditions apply.
74HCT Family
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