Nexperia HEF4094BT,653 8-stage Surface Mount Shift Register/Latch HEF, 16-Pin SOIC

The HEF4094B is an 8-stage serial shift register. It has a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3‑state outputs QP0 to QP7. The parallel outputs may be connected directly to common bus lines. Data is shifted on positive‑going clock transitions. The data in each shift register stage is transferred to the storage register when the strobe (STR) input is HIGH. Data in the storage register appears at the outputs whenever the output enable (OE) signal is HIGH. Two serial outputs (QS1 and QS2) are available for cascading a number of HEF4094B devices. Serial data is available at QS1 on positive‑going clock edges to allow high‑speed operation in cascaded systems with a fast clock rise time.

Simple control interface
I/O expansion
Asynchronous and synchronous load options
High frequency
Cascadable
LED drivers
Key applications
Displays
Control units

4000 CMOS Logic Family, Nexperia

CMOS Family devices
Wide operating voltage range: 3 to 18V