854S006AGILF, Clock Buffer LVDS, 2-Input, 24-Pin SOIC

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1 - 15₩34,516.80
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포장 옵션
RS 제품 번호:
216-6214
제조사 부품 번호:
854S006AGILF
제조업체:
Renesas Electronics
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브랜드

Renesas Electronics

Logic Family

LVDS

Logic Function

Clock Buffer

Input Signal Type

LVDS

Number of Clock Inputs

2

Package Type

SOIC

Pin Count

24

The Renesas Electronics 854S006 is a low skew, high performance 1-to-6, Differential-to-LVDS fanout buffer. The CLK, nCLK pair can accept most standard differential input levels. The 854S006 is characterized to operate from either a 2.5V or a 3.3V power supply. Guaranteed output and part-to-part skew characteristics make the 854S006 ideal for those clock distribution applications demanding well defined performance and repeatability.

Six differential LVDS outputs
One differential clock input pair
CLK, nCLK pair can accept the following differential input
levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL
Maximum output frequency: 1.7GHz
Translates any single-ended input signal to LVDS levels with
resistor bias on nCLK input
Output Skew: 55ps (maximum)
Propagation delay: 850ps (maximum)
Additive phase jitter, RMS: 0.067ps (typical)
Full 3.3V or 2.5V supply
-40°C to 85°C ambient operating temperature

For these non-cancellable (NC), and non-returnable (NR) products, Terms and Conditions apply.


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