Renesas Electronics ISL33001IUZ, 2-Channel Buffer, 8-Pin MSOP
- RS 제품 번호:
- 264-0627
- 제조사 부품 번호:
- ISL33001IUZ
- 제조업체:
- Renesas Electronics
본 이미지는 참조용이오니 재확인이 필요하시면 문의해주세요.
대량 구매 할인 기용 가능
View bulk pricing optionsSubtotal (1 pack of 5 units)*
₩19,060.00
마지막 RS 재고
- 최종적인 1,890 개 unit(s)이 배송 준비 됨
수량 | 한팩당 | 한팩당* |
|---|---|---|
| 5 - 5 | ₩3,812.00 | ₩19,060.00 |
| 10 - 20 | ₩3,432.00 | ₩17,160.00 |
| 25 - 45 | ₩3,364.00 | ₩16,820.00 |
| 50 - 95 | ₩3,244.00 | ₩16,220.00 |
| 100 + | ₩2,752.00 | ₩13,760.00 |
* 참고 가격: 실제 구매가격과 다를 수 있습니다
- RS 제품 번호:
- 264-0627
- 제조사 부품 번호:
- ISL33001IUZ
- 제조업체:
- Renesas Electronics
사양
참조 문서
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제품 세부 사항
제품 정보를 선택해 유사 제품을 찾기
모두 선택 | 제품 정보 | 값 |
|---|---|---|
| 브랜드 | Renesas Electronics | |
| Product Type | Buffer | |
| Logic Family | CMOS | |
| Logic Function | Driver, Buffer | |
| Number of Channels | 2 | |
| Schmitt Trigger Input | No | |
| Input Type | Buffered | |
| Mount Type | Surface | |
| Minimum Supply Voltage | 2.3V | |
| Package Type | MSOP | |
| Maximum Supply Voltage | 5.5V | |
| Pin Count | 8 | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 85°C | |
| Height | 1.2mm | |
| Length | 7.8mm | |
| Series | ISL33001 | |
| Standards/Approvals | RoHS | |
| Automotive Standard | No | |
| Supply Current | 4mA | |
| 모두 선택 | ||
|---|---|---|
브랜드 Renesas Electronics | ||
Product Type Buffer | ||
Logic Family CMOS | ||
Logic Function Driver, Buffer | ||
Number of Channels 2 | ||
Schmitt Trigger Input No | ||
Input Type Buffered | ||
Mount Type Surface | ||
Minimum Supply Voltage 2.3V | ||
Package Type MSOP | ||
Maximum Supply Voltage 5.5V | ||
Pin Count 8 | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 85°C | ||
Height 1.2mm | ||
Length 7.8mm | ||
Series ISL33001 | ||
Standards/Approvals RoHS | ||
Automotive Standard No | ||
Supply Current 4mA | ||
- COO (Country of Origin):
- MY
The Renesas Electronics buffers are 2 channel bus buffers that provide the buffering necessary to extend the bus capacitance beyond the 400pF maximum specified by the I2C specification. It consist of rise time accelerator circuitry to reduce power consumption from passive bus pull-up resistors and improve data-rate performance.
Bus capacitance buffering
Rise time accelerators
Hot swapping capability
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