제조사부품번호

Infineon SDRAM 64 MB Surface, 24-Pin 8 bit FBGA-24 Ball

RS 제품 번호:: 273-7513
제조사 부품 번호:: S27KL0642DPBHI020
제조업체:: Infineon

Infineon SDRAM 64 MB Surface, 24-Pin 8 bit FBGA-24 Ball

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대량 구매 할인 기용 가능

Subtotal (1 unit)*

₩4,982.00

재고있음

311 개 단위 배송 준비 완료

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수량	한팩당
1 - 9	₩4,982.00
10 - 24	₩3,948.00
25 - 49	₩3,854.00
50 - 99	₩3,797.60
100 +	₩3,703.60

* 참고 가격: 실제 구매가격과 다를 수 있습니다

RS 제품 번호:: 273-7513
제조사 부품 번호:: S27KL0642DPBHI020
제조업체:: Infineon

참조 문서

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제품 세부 사항

제품 정보를 선택해 유사 제품을 찾기

모두 선택	제품 정보	값
	브랜드	Infineon
	Product Type	SDRAM
	Memory Size	64MB
	Data Bus Width	8bit
	Maximum Clock Frequency	200MHz
	Number of Bits per Word	16
	Mount Type	Surface
	Package Type	FBGA-24 Ball
	Pin Count	24
	Minimum Operating Temperature	-40°C
	Maximum Operating Temperature	105°C
	Length	6mm
	Width	8 mm
	Series	S27K
	Standards/Approvals	No
	Height	1mm
	Maximum Supply Voltage	3.6V
	Supply Current	360μA
	Minimum Supply Voltage	1.8V
	Automotive Standard	AEC-Q100 Grade 2 & 3

	모두 선택
	브랜드 Infineon
	Product Type SDRAM
	Memory Size 64MB
	Data Bus Width 8bit
	Maximum Clock Frequency 200MHz
	Number of Bits per Word 16
	Mount Type Surface
	Package Type FBGA-24 Ball
	Pin Count 24
	Minimum Operating Temperature -40°C
	Maximum Operating Temperature 105°C
	Length 6mm
	Width 8 mm
	Series S27K
	Standards/Approvals No
	Height 1mm
	Maximum Supply Voltage 3.6V
	Supply Current 360μA
	Minimum Supply Voltage 1.8V
	Automotive Standard AEC-Q100 Grade 2 & 3

Datasheet - S27KL0642DPBHI020

The Infineon DRAM is a high speed CMOS, self refresh DRAM, with HYPERBUS interface. The DRAM array uses dynamic cells that require periodic refresh. Refresh control logic within the device manages the refresh operations on the DRAM array when the memory is not being actively read or written by the HYPERBUS interface master. Since the host is not required to manage any refresh operations, the DRAM array appears to the host as though the memory uses static cells that retain data without refresh. Hence, the memory is more accurately described as Pseudo Static RAM.

200 MHz maximum clock rate

Data throughput up to 400 MBps

Bidirectional read write data strobe

Automotive AEC Q100 Grade 2 and 3

Optional DDR centre aligned read strobe

DDR transfers data on both edges of the clock

Infineon SDRAM 64 MB Surface, 24-Pin 8 bit FBGA-24 Ball

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