Alliance Memory SDRAM 1 GB Surface, 84-Pin 16 bit FBGA
- RS 제품 번호:
- 230-8436
- 제조사 부품 번호:
- AS4C64M16D2A-25BIN
- 제조업체:
- Alliance Memory
본 이미지는 참조용이오니 재확인이 필요하시면 문의해주세요.
대량 구매 할인 기용 가능
Subtotal (1 tray of 209 units)*
₩1,842,794.80
일시적 품절
- 2026년 6월 08일 부터 배송
더 자세한 내용이 필요하신가요? 필요한 수량을 입력하고 '배송일 확인'을 클릭하면 더 많은 재고 및 배송 세부정보를 확인하실 수 있습니다.
수량 | 한팩당 | Per Tray* |
|---|---|---|
| 209 - 209 | ₩8,817.20 | ₩1,842,990.32 |
| 418 - 418 | ₩8,642.36 | ₩1,806,134.80 |
| 627 - 836 | ₩8,469.40 | ₩1,770,025.64 |
| 1045 + | ₩8,215.60 | ₩1,716,941.96 |
* 참고 가격: 실제 구매가격과 다를 수 있습니다
- RS 제품 번호:
- 230-8436
- 제조사 부품 번호:
- AS4C64M16D2A-25BIN
- 제조업체:
- Alliance Memory
사양
참조 문서
제정법과 컴플라이언스
제품 세부 사항
제품 정보를 선택해 유사 제품을 찾기
모두 선택 | 제품 정보 | 값 |
|---|---|---|
| 브랜드 | Alliance Memory | |
| Memory Size | 1GB | |
| Product Type | SDRAM | |
| Data Bus Width | 16bit | |
| Address Bus Width | 13bit | |
| Number of Bits per Word | 16 | |
| Maximum Clock Frequency | 400MHz | |
| Maximum Random Access Time | 0.4ns | |
| Mount Type | Surface | |
| Package Type | FBGA | |
| Pin Count | 84 | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 95°C | |
| Standards/Approvals | RoHS | |
| Series | AS4C64M16D2A | |
| Length | 8.1mm | |
| Height | 1.2mm | |
| Minimum Supply Voltage | 1.7V | |
| Automotive Standard | No | |
| Maximum Supply Voltage | 1.9V | |
| 모두 선택 | ||
|---|---|---|
브랜드 Alliance Memory | ||
Memory Size 1GB | ||
Product Type SDRAM | ||
Data Bus Width 16bit | ||
Address Bus Width 13bit | ||
Number of Bits per Word 16 | ||
Maximum Clock Frequency 400MHz | ||
Maximum Random Access Time 0.4ns | ||
Mount Type Surface | ||
Package Type FBGA | ||
Pin Count 84 | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 95°C | ||
Standards/Approvals RoHS | ||
Series AS4C64M16D2A | ||
Length 8.1mm | ||
Height 1.2mm | ||
Minimum Supply Voltage 1.7V | ||
Automotive Standard No | ||
Maximum Supply Voltage 1.9V | ||
The Alliance Memory AS4C64M16D2A is a high-speed CMOS Double-Data-Rate-Two (DDR2), synchronous dynamic random- access memory (SDRAM) containing 1024 Mbits in a 16-bit wide data I/Os. It is internally configured as a 8-bank DRAM, 8 banks x 8Mb addresses x 16 I/Os. The device is designed to comply with DDR2 DRAM key features such as posted CAS# with additive latency, Write latency = Read latency -1, Off-Chip Driver (OCD) impedance adjustment, and On Die Termination(ODT).
Supports JEDEC clock jitter specification
Fully synchronous operation
Fast clock rate: 400 MHz
Differential Clock, CK & CK#
Bidirectional single/differential data strobe DQS & DQS#
8 internal banks for concurrent operation
4-bit prefetch architecture
Inte
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