Alliance Memory AS4C32M16D3L-12BIN SDRAM 512 MB Surface, 96-Pin 16 bit FBGA
- RS 제품 번호:
- 230-8424
- 제조사 부품 번호:
- AS4C32M16D3L-12BIN
- 제조업체:
- Alliance Memory
본 이미지는 참조용이오니 재확인이 필요하시면 문의해주세요.
대량 구매 할인 기용 가능
Subtotal (1 pack of 2 units)*
₩17,160.00
현재 액세스할 수 없는 재고 정보 - 나중에 다시 확인해 주세요.
수량 | 한팩당 | 한팩당* |
|---|---|---|
| 2 - 8 | ₩8,580.00 | ₩17,160.00 |
| 10 - 18 | ₩8,316.75 | ₩16,633.50 |
| 20 - 48 | ₩8,160.75 | ₩16,321.50 |
| 50 + | ₩7,995.00 | ₩15,990.00 |
* 참고 가격: 실제 구매가격과 다를 수 있습니다
- RS 제품 번호:
- 230-8424
- 제조사 부품 번호:
- AS4C32M16D3L-12BIN
- 제조업체:
- Alliance Memory
사양
참조 문서
제정법과 컴플라이언스
제품 세부 사항
제품 정보를 선택해 유사 제품을 찾기
모두 선택 | 제품 정보 | 값 |
|---|---|---|
| 브랜드 | Alliance Memory | |
| Memory Size | 512MB | |
| Product Type | SDRAM | |
| Data Bus Width | 16bit | |
| Address Bus Width | 12bit | |
| Maximum Clock Frequency | 800MHz | |
| Number of Bits per Word | 16 | |
| Maximum Random Access Time | 20ns | |
| Mount Type | Surface | |
| Package Type | FBGA | |
| Pin Count | 96 | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 95°C | |
| Standards/Approvals | RoHS | |
| Series | AS4C32M16D3L | |
| Length | 8mm | |
| Height | 1mm | |
| Minimum Supply Voltage | 1.283V | |
| Maximum Supply Voltage | 1.45V | |
| Automotive Standard | No | |
| 모두 선택 | ||
|---|---|---|
브랜드 Alliance Memory | ||
Memory Size 512MB | ||
Product Type SDRAM | ||
Data Bus Width 16bit | ||
Address Bus Width 12bit | ||
Maximum Clock Frequency 800MHz | ||
Number of Bits per Word 16 | ||
Maximum Random Access Time 20ns | ||
Mount Type Surface | ||
Package Type FBGA | ||
Pin Count 96 | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 95°C | ||
Standards/Approvals RoHS | ||
Series AS4C32M16D3L | ||
Length 8mm | ||
Height 1mm | ||
Minimum Supply Voltage 1.283V | ||
Maximum Supply Voltage 1.45V | ||
Automotive Standard No | ||
The Alliance Memory 512Mb Double-Data-Rate-3L (DDR3L) DRAMs is double data rate architecture to achieve high-speed operation. It is internally configured as an eight bank DRAM.
8 internal banks for concurrent operation
8n-bit prefetch architecture
Pipelined internal architecture
Precharge & active power down
Programmable Mode & Extended Mode registers
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