Alliance Memory AS4C128M32MD4-062BAN SDRAM 4 GB Surface, 200-Pin 32 bit 200-Ball TFBGA
- RS 제품 번호:
- 425-209
- 제조사 부품 번호:
- AS4C128M32MD4-062BAN
- 제조업체:
- Alliance Memory
Subtotal (1 tray of 136 units)*
₩4,192,640.64
일시적 품절
- 2026년 6월 15일 부터 배송
더 자세한 내용이 필요하신가요? 필요한 수량을 입력하고 '배송일 확인'을 클릭하면 더 많은 재고 및 배송 세부정보를 확인하실 수 있습니다.
수량 | 한팩당 | Per Tray* |
|---|---|---|
| 136 + | ₩30,828.24 | ₩4,192,640.64 |
* 참고 가격: 실제 구매가격과 다를 수 있습니다
- RS 제품 번호:
- 425-209
- 제조사 부품 번호:
- AS4C128M32MD4-062BAN
- 제조업체:
- Alliance Memory
사양
참조 문서
제정법과 컴플라이언스
제품 세부 사항
제품 정보를 선택해 유사 제품을 찾기
모두 선택 | 제품 정보 | 값 |
|---|---|---|
| 브랜드 | Alliance Memory | |
| Memory Size | 4GB | |
| Product Type | SDRAM | |
| Organisation | 128M x 32 | |
| Data Bus Width | 32bit | |
| Maximum Clock Frequency | 1600MHz | |
| Number of Bits per Word | 32 | |
| Maximum Random Access Time | 3.5ns | |
| Mount Type | Surface | |
| Package Type | 200-Ball TFBGA | |
| Pin Count | 200 | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 105°C | |
| Width | 10.1 mm | |
| Height | 1.1mm | |
| Standards/Approvals | JEDEC, RoHS | |
| Series | AS4C128M32MD4 | |
| Length | 14.60mm | |
| Minimum Supply Voltage | 1.95V | |
| Automotive Standard | No | |
| Maximum Supply Voltage | 1.06V | |
| 모두 선택 | ||
|---|---|---|
브랜드 Alliance Memory | ||
Memory Size 4GB | ||
Product Type SDRAM | ||
Organisation 128M x 32 | ||
Data Bus Width 32bit | ||
Maximum Clock Frequency 1600MHz | ||
Number of Bits per Word 32 | ||
Maximum Random Access Time 3.5ns | ||
Mount Type Surface | ||
Package Type 200-Ball TFBGA | ||
Pin Count 200 | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 105°C | ||
Width 10.1 mm | ||
Height 1.1mm | ||
Standards/Approvals JEDEC, RoHS | ||
Series AS4C128M32MD4 | ||
Length 14.60mm | ||
Minimum Supply Voltage 1.95V | ||
Automotive Standard No | ||
Maximum Supply Voltage 1.06V | ||
- COO (Country of Origin):
- TW
The Alliance Memory DDR4 SDRAM is a high-speed dynamic random-access memory internally organized with eight-banks. DDR4 SDRAM uses a 8n prefect architecture to achieve high-speed operation. Operation begins with the registration of an Activate Command, which is then followed by a Read or Write command.
ZQ Calibration
JEDEC Standard Compliant
Write Leveling
RoHS compliant
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