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Texas Instruments SN74LVC1G97DCKR, 1 3-Input Multifunction Schmitt Trigger Input Logic Gate, 6-Pin SC-70

RS 제품 번호:: 662-8828
제조사 부품 번호:: SN74LVC1G97DCKR
제조업체:: Texas Instruments

Texas Instruments SN74LVC1G97DCKR, 1 3-Input Multifunction Schmitt Trigger Input Logic Gate, 6-Pin SC-70

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RS 제품 번호:: 662-8828
제조사 부품 번호:: SN74LVC1G97DCKR
제조업체:: Texas Instruments

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모두 선택	제품 정보	값
	브랜드	Texas Instruments
	Product Type	Logic Gate
	Logic Function	Multifunction
	Mount Type	Surface
	Number of Elements	1
	Number of Inputs per Gate	3
	Schmitt Trigger Input	Yes
	Package Type	SC-70
	Pin Count	6
	Logic Family	LVC
	Input Type	Schmitt Trigger
	Minimum Operating Temperature	-40°C
	Maximum Propagation Delay Time @ CL	6.1ns
	Maximum High Level Output Current	-32mA
	Maximum Operating Temperature	85°C
	Standards/Approvals	No
	Maximum Supply Voltage	5.5V
	Series	SN74
	Length	2mm
	Minimum Supply Voltage	1.65V
	Height	0.9mm
	Maximum Low Level Output Current	32mA
	Output Type	CMOS
	Automotive Standard	No

	모두 선택
	브랜드 Texas Instruments
	Product Type Logic Gate
	Logic Function Multifunction
	Mount Type Surface
	Number of Elements 1
	Number of Inputs per Gate 3
	Schmitt Trigger Input Yes
	Package Type SC-70
	Pin Count 6
	Logic Family LVC
	Input Type Schmitt Trigger
	Minimum Operating Temperature -40°C
	Maximum Propagation Delay Time @ CL 6.1ns
	Maximum High Level Output Current -32mA
	Maximum Operating Temperature 85°C
	Standards/Approvals No
	Maximum Supply Voltage 5.5V
	Series SN74
	Length 2mm
	Minimum Supply Voltage 1.65V
	Height 0.9mm
	Maximum Low Level Output Current 32mA
	Output Type CMOS
	Automotive Standard No

ESD Control Selection Guide V1

74LVC1G Family, Texas Instruments

Low-Voltage CMOS logic

Single gate package

Operating Voltage: 1.65 to 5.5 V

Compatibility: Input LVTTL/TTL, Output LVCMOS

Latch-up performance exceeds 100 mA per JESD 78 Class II

ESD protection exceeds JESD 22

Texas Instruments SN74LVC1G97DCKR, 1 3-Input Multifunction Schmitt Trigger Input Logic Gate, 6-Pin SC-70

74LVC1G Family, Texas Instruments

74LVC Family

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