Nexperia 74LVC00APW,118, 4 2-Input NAND Schmitt Trigger Input Logic Gate, 14-Pin TSSOP
- RS 제품 번호:
- 170-8012
- 제조사 부품 번호:
- 74LVC00APW,118
- 제조업체:
- Nexperia
대량 구매 할인 기용 가능
Subtotal (1 reel of 2500 units)*
₩432,400.00
일시적 품절
- 2026년 7월 30일 부터 배송
더 자세한 내용이 필요하신가요? 필요한 수량을 입력하고 '배송일 확인'을 클릭하면 더 많은 재고 및 배송 세부정보를 확인하실 수 있습니다.
수량 | 한팩당 | 릴당* |
|---|---|---|
| 2500 - 10000 | ₩172.96 | ₩431,460.00 |
| 12500 + | ₩169.20 | ₩423,000.00 |
* 참고 가격: 실제 구매가격과 다를 수 있습니다
- RS 제품 번호:
- 170-8012
- 제조사 부품 번호:
- 74LVC00APW,118
- 제조업체:
- Nexperia
사양
참조 문서
제정법과 컴플라이언스
제품 세부 사항
제품 정보를 선택해 유사 제품을 찾기
모두 선택 | 제품 정보 | 값 |
|---|---|---|
| 브랜드 | Nexperia | |
| Product Type | Logic Gate | |
| Logic Function | NAND | |
| Mount Type | Surface Mount | |
| Number of Elements | 4 | |
| Number of Inputs per Gate | 2 | |
| Schmitt Trigger Input | Yes | |
| Package Type | TSSOP | |
| Pin Count | 14 | |
| Logic Family | 74LVC | |
| Input Type | Schmitt Trigger | |
| Minimum Operating Temperature | -40°C | |
| Maximum High Level Output Current | -24mA | |
| Maximum Operating Temperature | 125°C | |
| Length | 5.1mm | |
| Width | 4.5 mm | |
| Maximum Supply Voltage | 3.6V | |
| Height | 0.95mm | |
| Minimum Supply Voltage | 1.2V | |
| Maximum Low Level Output Current | 24mA | |
| Output Type | Single Ended | |
| 모두 선택 | ||
|---|---|---|
브랜드 Nexperia | ||
Product Type Logic Gate | ||
Logic Function NAND | ||
Mount Type Surface Mount | ||
Number of Elements 4 | ||
Number of Inputs per Gate 2 | ||
Schmitt Trigger Input Yes | ||
Package Type TSSOP | ||
Pin Count 14 | ||
Logic Family 74LVC | ||
Input Type Schmitt Trigger | ||
Minimum Operating Temperature -40°C | ||
Maximum High Level Output Current -24mA | ||
Maximum Operating Temperature 125°C | ||
Length 5.1mm | ||
Width 4.5 mm | ||
Maximum Supply Voltage 3.6V | ||
Height 0.95mm | ||
Minimum Supply Voltage 1.2V | ||
Maximum Low Level Output Current 24mA | ||
Output Type Single Ended | ||
The 74LVC00A provides four 2-input NAND gates. Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications.
Key features and benefits
Mixed 5 V and 3.3 V applications
Reduce time to market for complex designs
Save board space
Open-drain output options
Improved signal integrity for complex layouts
Wide supply voltage range
Low propagation delay
Overvoltage tolerant options
Low input threshold options
CMOS low power
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