onsemi MC14043BDG 18 Bit D Type Latch, Transparent RS-Latch, 3 State, 16-Pin SOIC
- RS 제품 번호:
- 184-4251
- 제조사 부품 번호:
- MC14043BDG
- 제조업체:
- onsemi
대량 구매 할인 기용 가능
Subtotal (1 tube of 48 units)*
₩25,086.72
재고있음
- 추가로 2026년 1월 05일 부터 96 개 단위 배송
더 자세한 내용이 필요하신가요? 필요한 수량을 입력하고 '배송일 확인'을 클릭하면 더 많은 재고 및 배송 세부정보를 확인하실 수 있습니다.
수량 | 한팩당 | Per Tube* |
|---|---|---|
| 48 - 432 | ₩522.64 | ₩25,041.60 |
| 480 - 912 | ₩500.08 | ₩24,030.16 |
| 960 + | ₩479.40 | ₩23,030.00 |
* 참고 가격: 실제 구매가격과 다를 수 있습니다
- RS 제품 번호:
- 184-4251
- 제조사 부품 번호:
- MC14043BDG
- 제조업체:
- onsemi
사양
참조 문서
제정법과 컴플라이언스
제품 세부 사항
제품 정보를 선택해 유사 제품을 찾기
모두 선택 | 제품 정보 | 값 |
|---|---|---|
| 브랜드 | onsemi | |
| Logic Family | 4000 | |
| Latch Mode | Transparent | |
| Latching Element | RS-Latch | |
| Number of Elements per Chip | 1 | |
| Number of Channels per Chip | 4 | |
| Output Type | 3 State | |
| Polarity | Non-Inverting | |
| Mounting Type | Surface Mount | |
| Package Type | SOIC | |
| Pin Count | 16 | |
| Set/Reset | Yes | |
| Dimensions | 10 x 4 x 1.5mm | |
| Height | 1.5mm | |
| Length | 10mm | |
| Minimum Operating Temperature | -55 °C | |
| Maximum Operating Temperature | +125 °C | |
| Maximum Operating Supply Voltage | +18 V | |
| Width | 4mm | |
| Automotive Standard | AEC-Q100 | |
| Minimum Operating Supply Voltage | -5 V | |
| 모두 선택 | ||
|---|---|---|
브랜드 onsemi | ||
Logic Family 4000 | ||
Latch Mode Transparent | ||
Latching Element RS-Latch | ||
Number of Elements per Chip 1 | ||
Number of Channels per Chip 4 | ||
Output Type 3 State | ||
Polarity Non-Inverting | ||
Mounting Type Surface Mount | ||
Package Type SOIC | ||
Pin Count 16 | ||
Set/Reset Yes | ||
Dimensions 10 x 4 x 1.5mm | ||
Height 1.5mm | ||
Length 10mm | ||
Minimum Operating Temperature -55 °C | ||
Maximum Operating Temperature +125 °C | ||
Maximum Operating Supply Voltage +18 V | ||
Width 4mm | ||
Automotive Standard AEC-Q100 | ||
Minimum Operating Supply Voltage -5 V | ||
The MC14043B and MC14044B quad R-S latches are constructed with MOS P-channel and N-channel enhancement mode devices in a single monolithic structure. Each latch has an independent Q output and set and reset inputs. The Q outputs are gated through three-state buffers having a common enable input. The outputs are enabled with a logical "1" or high on the enable input, a logical "0" or low disconnects the latch from the Q outputs, resulting in an open circuit at the Q outputs.
Double Diode Input Protection
Three-State Outputs with Common Enable
Outputs Capable of Driving Two Low-power TTL Loads or One Low-Power Schottky TTL Load Over the Rated Temperature Range
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Pb-Free Packages are Available
Three-State Outputs with Common Enable
Outputs Capable of Driving Two Low-power TTL Loads or One Low-Power Schottky TTL Load Over the Rated Temperature Range
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Pb-Free Packages are Available
For these non-cancellable (NC), and non-returnable (NR) products, Terms and Conditions apply.
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