Nexperia 74HC574PW,118 1 Flip Flop IC 74HC, 3 State, 20-Pin TSSOP
- RS 제품 번호:
- 170-5409
- 제조사 부품 번호:
- 74HC574PW,118
- 제조업체:
- Nexperia
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대량 구매 할인 기용 가능
Subtotal (1 pack of 50 units)*
₩20,865.00
재고있음
- 350 개 단위 배송 준비 완료
- 추가로 2026년 9월 23일 부터 2,500 개 단위 배송
더 자세한 내용이 필요하신가요? 필요한 수량을 입력하고 '배송일 확인'을 클릭하면 더 많은 재고 및 배송 세부정보를 확인하실 수 있습니다.
수량 | 한팩당 | 한팩당* |
|---|---|---|
| 50 - 600 | ₩417.30 | ₩20,904.00 |
| 650 - 1200 | ₩407.55 | ₩20,358.00 |
| 1250 + | ₩401.70 | ₩20,046.00 |
* 참고 가격: 실제 구매가격과 다를 수 있습니다
- RS 제품 번호:
- 170-5409
- 제조사 부품 번호:
- 74HC574PW,118
- 제조업체:
- Nexperia
사양
참조 문서
제정법과 컴플라이언스
제품 세부 사항
제품 정보를 선택해 유사 제품을 찾기
모두 선택 | 제품 정보 | 값 |
|---|---|---|
| 브랜드 | Nexperia | |
| Product Type | Flip Flop IC | |
| Logic Family | 74HC | |
| Input Type | CMOS | |
| Output Type | 3 State | |
| Clock Frequency | 24MHz | |
| Polarity | Non-Inverting | |
| Mount Type | Surface | |
| Minimum Supply Voltage | 2V | |
| Package Type | TSSOP | |
| Maximum Supply Voltage | 6V | |
| Pin Count | 20 | |
| Trigger Type | Positive Edge | |
| Maximum Propagation Delay Time @ CL | 38ns | |
| Minimum Operating Temperature | -40°C | |
| Flip-Flop Type | D Flip-Flop | |
| Number of Elements per Chip | 1 | |
| Maximum Operating Temperature | 125°C | |
| Standards/Approvals | No | |
| Length | 6.6mm | |
| Height | 0.95mm | |
| Automotive Standard | No | |
| 모두 선택 | ||
|---|---|---|
브랜드 Nexperia | ||
Product Type Flip Flop IC | ||
Logic Family 74HC | ||
Input Type CMOS | ||
Output Type 3 State | ||
Clock Frequency 24MHz | ||
Polarity Non-Inverting | ||
Mount Type Surface | ||
Minimum Supply Voltage 2V | ||
Package Type TSSOP | ||
Maximum Supply Voltage 6V | ||
Pin Count 20 | ||
Trigger Type Positive Edge | ||
Maximum Propagation Delay Time @ CL 38ns | ||
Minimum Operating Temperature -40°C | ||
Flip-Flop Type D Flip-Flop | ||
Number of Elements per Chip 1 | ||
Maximum Operating Temperature 125°C | ||
Standards/Approvals No | ||
Length 6.6mm | ||
Height 0.95mm | ||
Automotive Standard No | ||
The 74HC574: 74HCT574 is an 8-bit positive-edge triggered D-type flip-flop with 3-state outputs. The device features a clock (CP) and output enable (OE) inputs. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops.
Mixed 5 V and 3.3 V applications
Improved signal integrity with integrated termination resistors
High noise immunity
Flow through pin out for easy layout
Wide supply voltage range
Low propagation delay
Overvoltage tolerant input options
Integrated source termination resistor options
Bus hold options
Frequency division
Controlled delays
Interface between asynchronous and synchronous systems
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