Infineon NOR 256Mbit Quad-SPI Flash Memory 8-Pin WSON, S25FL256LAGNFM010
- RS 재고 번호:
- 181-1605
- 제조 부품 번호:
- S25FL256LAGNFM010
- 제조업체:
- Infineon
대량 구매 할인 기용 가능
Subtotal (1 unit)*
₩6,185.20
일시적 품절
- 762 개 단위 배송 준비 완료
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단위당 | 한팩당 |
|---|---|
| 1 - 84 | ₩6,185.20 |
| 85 - 168 | ₩6,053.60 |
| 169 + | ₩5,922.00 |
* 참고 가격: 실제 구매가격과 다를 수 있습니다
- RS 재고 번호:
- 181-1605
- 제조 부품 번호:
- S25FL256LAGNFM010
- 제조업체:
- Infineon
사양
기술적 참조
제정법과 컴플라이언스
제품 세부 사항
제품 정보를 선택해 유사 제품을 찾기
모두 선택 | 제품 정보 | 값 |
|---|---|---|
| 브랜드 | Infineon | |
| Memory Size | 256Mbit | |
| Interface Type | Quad-SPI | |
| Package Type | WSON | |
| Pin Count | 8 | |
| Organisation | 32M x 8 bit | |
| Mounting Type | Surface Mount | |
| Cell Type | NOR | |
| Minimum Operating Supply Voltage | 2.7 V | |
| Maximum Operating Supply Voltage | 3.6 V | |
| Block Organisation | Symmetrical | |
| Length | 5.28mm | |
| Height | 1.9mm | |
| Width | 5.28mm | |
| Dimensions | 5.28 x 5.28 x 1.9mm | |
| Number of Bits per Word | 8bit | |
| Number of Words | 32M | |
| Maximum Random Access Time | 8ns | |
| Series | S25FL | |
| Automotive Standard | AEC-Q100 | |
| Minimum Operating Temperature | -40 °C | |
| Maximum Operating Temperature | +125 °C | |
| 모두 선택 | ||
|---|---|---|
브랜드 Infineon | ||
Memory Size 256Mbit | ||
Interface Type Quad-SPI | ||
Package Type WSON | ||
Pin Count 8 | ||
Organisation 32M x 8 bit | ||
Mounting Type Surface Mount | ||
Cell Type NOR | ||
Minimum Operating Supply Voltage 2.7 V | ||
Maximum Operating Supply Voltage 3.6 V | ||
Block Organisation Symmetrical | ||
Length 5.28mm | ||
Height 1.9mm | ||
Width 5.28mm | ||
Dimensions 5.28 x 5.28 x 1.9mm | ||
Number of Bits per Word 8bit | ||
Number of Words 32M | ||
Maximum Random Access Time 8ns | ||
Series S25FL | ||
Automotive Standard AEC-Q100 | ||
Minimum Operating Temperature -40 °C | ||
Maximum Operating Temperature +125 °C | ||
The FL-L family connects to a host system via a Serial Peripheral Interface (SPI). Traditional SPI single bit serial input and output (Single I/O or SIO) is supported as well as optional two bit (Dual I/O or DIO) and four bit wide Quad I/O (QIO) and Quad Peripheral Interface (QPI) commands. In addition, there are Double Data Rate (DDR) read commands for QIO and QPI that transfer address and read data on both edges of the clock. The architecture features a Page Programming Buffer that allows up to 256-bytes to be programmed in one operation and provides individual 4KB sector, 32KB half block, 64KB block, or entire chip erase. By using FL-L family devices at the higher clock rates supported, with Quad commands, the instruction read transfer rate can match or exceed traditional parallel interface, asynchronous, NOR Flash memories, while reducing signal count dramatically. The FL-L family products offer high densities coupled with the flexibility and fast performance required by a variety of mobile or embedded applications. Provides an ideal storage solution for systems with limited space, signal connections, and power.
For these non-cancellable (NC), and non-returnable (NR) products, Terms and Conditions apply.
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