Infineon NOR 128 MB Quad-SPI Flash Memory 8-Pin SOIC, S25FL128LAGMFI010

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3 - 69₩4,966.00₩14,900.00
72 - 138₩4,860.00₩14,580.00
141 +₩4,754.00₩14,260.00

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포장 옵션
RS 제품 번호:
181-1584
제조사 부품 번호:
S25FL128LAGMFI010
제조업체:
Infineon
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모두 선택

브랜드

Infineon

Product Type

Flash Memory

Memory Size

128MB

Interface Type

Quad-SPI

Package Type

SOIC

Pin Count

8

Organisation

16M x 8 bit

Mount Type

Surface

Cell Type

NOR

Maximum Supply Voltage

3.6V

Minimum Supply Voltage

2.7V

Minimum Operating Temperature

-40°C

Maximum Operating Temperature

85°C

Length

5.28mm

Width

5.28mm

Standards/Approvals

RoHS

Height

1.9mm

Series

S25FL128

Number of Bits per Word

8

Number of Words

16M

Automotive Standard

AEC-Q100

Infineon S25FL128 Series Flash Memory, 128MB Memory Size, 2.7V Minimum Supply Voltage - S25FL128LAGMFI010


This flash memory is a surface-mount NOR memory device designed for quad‑SPI interfacing in demanding environments. It provides non‑volatile storage suitable for embedded systems requiring moderate capacity and predictable organisation, operating across a broad industrial temperature range and supplied in an SOIC package with an 8‑pin footprint.

Features and Benefits:


• 128MB capacity for compact high‑density storage
• 16Mx8‑bit organisation enabling byte‑addressable operations
• Quad‑SPI interface for faster serial read throughput
• 2.7V-3.6V supply range supporting varied power rails
• -40°C to 85°C rating for extended‑temperature deployments
• RoHS conformity reducing hazardous substance risk

Applications


• Suitable for automotive control unit code storage
• Ideal for industrial instrumentation firmware retention
• Used with bootloader storage in embedded systems
• Can be used for in‑vehicle infotainment data assets
• Used for programme memory in networked devices

What package should designers expect when placing this device?


The device is supplied in an SOIC surface‑mount package with an 8‑pin configuration suitable for automated PCB assembly processes.

How is memory organised for software mapping?


Memory is arranged as 16M words of 8 bits each, allowing straightforward byte‑wise addressing for code and data segments.

What cell architecture underpins data retention and random access?


The device uses NOR cell technology, which provides direct read access and predictable execute‑in‑place behaviour for code storage.

Which operating voltages must power management deliver?


The device requires a supply between 2.7V and 3.6V

designs should maintain that range for reliable operation.

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