Renesas Electronics FIFO Memory, 28-Pin PDIP, 7204L12TPG
- RS 제품 번호:
- 262-8983
- 제조사 부품 번호:
- 7204L12TPG
- 제조업체:
- Renesas Electronics
대량 구매 할인 기용 가능
Subtotal (1 unit)*
₩34,328.80
마지막 RS 재고
- 최종적인 12 개 unit(s)이 배송 준비 됨
수량 | 한팩당 |
|---|---|
| 1 - 4 | ₩34,328.80 |
| 5 - 9 | ₩33,633.20 |
| 10 - 27 | ₩31,978.80 |
| 28 - 55 | ₩31,621.60 |
| 56 + | ₩30,850.80 |
* 참고 가격: 실제 구매가격과 다를 수 있습니다
- RS 제품 번호:
- 262-8983
- 제조사 부품 번호:
- 7204L12TPG
- 제조업체:
- Renesas Electronics
사양
참조 문서
제정법과 컴플라이언스
제품 세부 사항
제품 정보를 선택해 유사 제품을 찾기
모두 선택 | 제품 정보 | 값 |
|---|---|---|
| 브랜드 | Renesas Electronics | |
| Product Type | FIFO Memory | |
| Organisation | 4096 x 9 bit | |
| Data Bus Width | 9bit | |
| Access Time | 12ns | |
| Mount Type | Surface | |
| Package Type | PDIP | |
| Minimum Supply Voltage | 4.5V | |
| Maximum Supply Voltage | 5.5V | |
| Pin Count | 28 | |
| Bus Direction | Bi-Directional | |
| Minimum Operating Temperature | 0°C | |
| Maximum Operating Temperature | 70°C | |
| Length | 34.3mm | |
| Series | 7204 | |
| Width | 7.62 mm | |
| Height | 3.3mm | |
| Standards/Approvals | No | |
| Automotive Standard | No | |
| Supply Current | 120mA | |
| Number of Bits per Word | 9 | |
| 모두 선택 | ||
|---|---|---|
브랜드 Renesas Electronics | ||
Product Type FIFO Memory | ||
Organisation 4096 x 9 bit | ||
Data Bus Width 9bit | ||
Access Time 12ns | ||
Mount Type Surface | ||
Package Type PDIP | ||
Minimum Supply Voltage 4.5V | ||
Maximum Supply Voltage 5.5V | ||
Pin Count 28 | ||
Bus Direction Bi-Directional | ||
Minimum Operating Temperature 0°C | ||
Maximum Operating Temperature 70°C | ||
Length 34.3mm | ||
Series 7204 | ||
Width 7.62 mm | ||
Height 3.3mm | ||
Standards/Approvals No | ||
Automotive Standard No | ||
Supply Current 120mA | ||
Number of Bits per Word 9 | ||
- COO (Country of Origin):
- TH
The Renesas Electronics FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a retransmit capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.
Pin and functionally compatible with 720X family
Low power consumption
Ultra high speed 12ns access time
Asynchronous and simultaneous read and write
Fully expandable by both word depth and/or bit width
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