Nexperia 74LVC8T245BZX Logic Level Translator, 8-Bit Non-Inverting TTL, 24-Pin SOT-8024

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Subtotal (1 pack of 10 units)*

₩18,104.40

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한팩당
한팩당*
10 - 40₩1,810.44₩18,104.40
50 - 90₩1,765.32₩17,653.20
100 - 240₩1,723.96₩17,239.60
250 - 990₩1,682.60₩16,826.00
1000 +₩1,643.12₩16,431.20

* 참고 가격: 실제 구매가격과 다를 수 있습니다

포장 옵션
RS 제품 번호:
243-4424
제조사 부품 번호:
74LVC8T245BZX
제조업체:
Nexperia
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브랜드

Nexperia

Product Type

Logic Level Translator

Logic Family

74LVC

Logic Function

Translating Transceiver

Number of Channels

8

Polarity

Non-Inverting

Mount Type

Surface

Package Type

SOT-8024

Pin Count

24

Minimum Supply Voltage

3V

Maximum Supply Voltage

5.5V

Input Level

TTL

Output Level

TTL

Maximum Propagation Delay Time @ CL

4.1ns

Minimum Operating Temperature

-40°C

Maximum Operating Temperature

125°C

Maximum High Level Output Current

24mA

Standards/Approvals

RoHS

Length

2mm

Series

74LVC8T245

Width

3.2 mm

Maximum Low Level Output Current

24mA

Height

0.48mm

Automotive Standard

No

Output Type

3 State

The Nexperia 8-bit dual supply translating transceivers with 3-state outputs that enable bidirectional level translation. They feature two data input-output ports (pins An and Bn), a direction control input (DIR), an output enable input (OE) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 1.2 V and 5.5 V making the device suitable for translating between any of the low voltage nodes (1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V and 5.0 V). Pins An, OE and DIR are referenced to VCC(A) and pins Bn are referenced to VCC(B). A HIGH on DIR allows transmission from An to Bn and a LOW on DIR allows transmission from Bn to An.

Suspend mode

Latch-up performance exceeds 100 mA per JESD 78B Class II

±24 mA output drive (VCC = 3.0 V)

Inputs accept voltages up to 5.5 V

Low power consumption 30 μA maximum ICC

IOFF circuitry provides partial Power-down mode operation

Specified from -40 °C to +85 °C and -40 °C to +125 °C

The output enable input (OE) can be used to disable the outputs so the buses are effectively isolated. The devices are fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both A port and B port are in the high-impedance OFF-state. Active bus hold circuitry in the 74LVCH8T245 holds unused or floating data inputs at a valid logic level.

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