Microchip ATSAMA5D27C-D1G-CU, ARM Cortex A5 Microprocessor SAMA5D2 32bit ARM 500MHz 289-Pin LFBGA
- RS 제품 번호:
- 165-6445P
- 제조사 부품 번호:
- ATSAMA5D27C-D1G-CU
- 제조업체:
- Microchip
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- RS 제품 번호:
- 165-6445P
- 제조사 부품 번호:
- ATSAMA5D27C-D1G-CU
- 제조업체:
- Microchip
사양
참조 문서
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제품 세부 사항
제품 정보를 선택해 유사 제품을 찾기
모두 선택 | 제품 정보 | 값 |
|---|---|---|
| 브랜드 | Microchip | |
| Family Name | SAMA5D2 | |
| Device Core | ARM Cortex A5 | |
| Data Bus Width | 32bit | |
| Instruction Set Architecture | ARM | |
| Maximum Frequency | 500MHz | |
| I/O Voltage | 1.65 → 3.6V | |
| Mounting Type | Surface Mount | |
| Package Type | LFBGA | |
| Pin Count | 289 | |
| Typical Operating Supply Voltage | 1.2 V, 1.35 V, 1.5 V, 1.8 V, 3.3 V | |
| Dimensions | 14 x 14 x 1.03mm | |
| Minimum Operating Temperature | -40 °C | |
| Maximum Operating Temperature | +85 °C | |
| 모두 선택 | ||
|---|---|---|
브랜드 Microchip | ||
Family Name SAMA5D2 | ||
Device Core ARM Cortex A5 | ||
Data Bus Width 32bit | ||
Instruction Set Architecture ARM | ||
Maximum Frequency 500MHz | ||
I/O Voltage 1.65 → 3.6V | ||
Mounting Type Surface Mount | ||
Package Type LFBGA | ||
Pin Count 289 | ||
Typical Operating Supply Voltage 1.2 V, 1.35 V, 1.5 V, 1.8 V, 3.3 V | ||
Dimensions 14 x 14 x 1.03mm | ||
Minimum Operating Temperature -40 °C | ||
Maximum Operating Temperature +85 °C | ||
The SAMA5D27C-D1G System in Package (SiP) integrates the ARM® Cortex®-A5 processor-based SAMA5D27C MPU with 1 Gbit (128 Mbytes) of DDR2-SDRAM in a single package. By combining the high-performance, ultra-low-power SAMA5D2 with DDR2-SDRAM in a single package, PCB routing complexity, area and number of layers is reduced in the majority of cases. This makes board design easier and more robust by facilitating design for EMI, ESD and signal integrity. This SiP targets applications using Linux OS and is available in a BGA289 package.
ARM Cortex-A5 core
Memory Architecture
Memory Management Unit
32-Kbyte L1 data cache, 32-Kbyte L1 instruction cache
128-Kbyte L2 cache configurable to be used as an internal SRAM
1Gb DDR2-SDRAM
One 128-Kbyte scrambled internal SRAM
8-bit SLC/MLC NAND controller, with up to 32-bit Error Correcting Code (PMECC)
Low-Power Modes
Ultra Low-power mode with fast wakeup capability
Memory Architecture
Memory Management Unit
32-Kbyte L1 data cache, 32-Kbyte L1 instruction cache
128-Kbyte L2 cache configurable to be used as an internal SRAM
1Gb DDR2-SDRAM
One 128-Kbyte scrambled internal SRAM
8-bit SLC/MLC NAND controller, with up to 32-bit Error Correcting Code (PMECC)
Low-Power Modes
Ultra Low-power mode with fast wakeup capability