Microchip ATSAMD21E17A-AU ARM Cortex, SAM D21/DA1 Microcontroller, 48 MHz, 128kB FLASH, 32-Pin TQFP

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Subtotal (1 pack of 5 units)*

₩20,266.40

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한팩당
한팩당*
5 - 5₩4,053.28₩20,266.40
10 - 20₩3,974.32₩19,871.60
25 - 45₩3,891.60₩19,458.00
50 - 95₩3,816.40₩19,082.00
100 +₩3,737.44₩18,687.20

* 참고 가격: 실제 구매가격과 다를 수 있습니다

RS 제품 번호:
236-8840
제조사 부품 번호:
ATSAMD21E17A-AU
제조업체:
Microchip
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브랜드

Microchip

Product Type

Microcontroller

Series

SAM D21/DA1

Package Type

TQFP

Pin Count

32

Device Core

ARM Cortex

Program Memory Size

128kB

Interface Type

I2S, SERCOM, USB 2.0

Maximum Clock Frequency

48MHz

Maximum Supply Voltage

3.63V

Minimum Operating Temperature

-40°C

Analogue Comparators

4

Number of Programmable I/Os

52

DACs

10 Bit

Maximum Operating Temperature

125°C

Standards/Approvals

AEC-Q100

Minimum Supply Voltage

1.62V

Number of Timers

16

Instruction Set Architecture

Thumb, Arm Cortex

Automotive Standard

AEC-Q100 Grade 1, AEC-Q100 Grade 2

Program Memory Type

FLASH

ADCs

12 bit

The Microchip low power microcontrollers using the 32-bit Arm® Cortex®-M0+ processor, and32-pinswith up to 256 KB Flash and 32 KB of SRAM. It operates at a maximum frequency of 48 MHz and reach 2.46 CoreMark/MHz. They are designed for simple and intuitive migration with identical peripheral modules, hex compatible code, identical linear address map, and pin compatible migration paths between all devices in the product series. All devices include intelligent and flexible peripherals, Event System for inter-peripheral signalling, and support for capacitive touch button, slider, and wheel user interfaces.

External interrupt controller (EIC)

16 external interrupts

One non maskable interrupt (NMI)

Two pin serial wire debug (SWD) programming, test and debugging interface

Low power consumption

Idle and Standby Sleep modes

SleepWalking peripherals

12 Channel Direct memory access controller (DMAC)

12 Channel Event System

Up to five 16-bit trimer/counters

One 16-bit TC with two compare/capture channels

One 8 bit TC with two compare/capture channels

One 32-bit TC with two compare/capture channels, by using two TCs

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