Lapis, 16bit, ML62Q1200A Microcontroller, 32.76kHz, 48 kB Flash, 24-Pin WQFN
- RS 제품 번호:
- 180-8491
- 제조사 부품 번호:
- ML62Q1246A-NNNGD
- 제조업체:
- Lapis
대량 구매 할인 기용 가능
Subtotal (1 pack of 3 units)*
₩10,484.76
현재 액세스할 수 없는 재고 정보 - 나중에 다시 확인해 주세요.
수량 | 한팩당 | 한팩당* |
|---|---|---|
| 3 - 27 | ₩3,494.92 | ₩10,484.76 |
| 30 - 57 | ₩2,795.56 | ₩8,384.80 |
| 60 + | ₩2,308.64 | ₩6,924.04 |
* 참고 가격: 실제 구매가격과 다를 수 있습니다
- RS 제품 번호:
- 180-8491
- 제조사 부품 번호:
- ML62Q1246A-NNNGD
- 제조업체:
- Lapis
사양
참조 문서
제정법과 컴플라이언스
제품 세부 사항
제품 정보를 선택해 유사 제품을 찾기
모두 선택 | 제품 정보 | 값 |
|---|---|---|
| 브랜드 | Lapis | |
| Family Name | ML62Q1200A | |
| Package Type | WQFN | |
| Mounting Type | Surface Mount | |
| Pin Count | 24 | |
| Data Bus Width | 16bit | |
| Program Memory Size | 48 kB | |
| Maximum Frequency | 32.76kHz | |
| RAM Size | 4 kB | |
| Typical Operating Supply Voltage | 5.5 (Maximum) V | |
| Number of I2C Channels | 2 | |
| Number of UART Channels | 2 | |
| Program Memory Type | Flash | |
| Maximum Operating Temperature | +105 °C | |
| Number of ADC Units | 1 | |
| Width | 4mm | |
| ADCs | 1 (8 x 10 bit) | |
| Height | 0.8mm | |
| Instruction Set Architecture | RISC | |
| Minimum Operating Temperature | -40 °C | |
| Data Rate | 2Mbit/s | |
| Length | 4mm | |
| Dimensions | 4 x 4 x 0.8mm | |
| 모두 선택 | ||
|---|---|---|
브랜드 Lapis | ||
Family Name ML62Q1200A | ||
Package Type WQFN | ||
Mounting Type Surface Mount | ||
Pin Count 24 | ||
Data Bus Width 16bit | ||
Program Memory Size 48 kB | ||
Maximum Frequency 32.76kHz | ||
RAM Size 4 kB | ||
Typical Operating Supply Voltage 5.5 (Maximum) V | ||
Number of I2C Channels 2 | ||
Number of UART Channels 2 | ||
Program Memory Type Flash | ||
Maximum Operating Temperature +105 °C | ||
Number of ADC Units 1 | ||
Width 4mm | ||
ADCs 1 (8 x 10 bit) | ||
Height 0.8mm | ||
Instruction Set Architecture RISC | ||
Minimum Operating Temperature -40 °C | ||
Data Rate 2Mbit/s | ||
Length 4mm | ||
Dimensions 4 x 4 x 0.8mm | ||
- COO (Country of Origin):
- JP
16-bit RISC CPU (CPU name: nX-U16/100)
Instruction system: 16-bit length instruction
Instruction set: Transfer, arithmetic operations, comparison, logic operations, multiplication/division, bit manipulations,
bit logic operations, jump, conditional jump, call return stack manipulations, arithmetic shift, and so on
On-chip debug function built-in (supported by LAPIS on-chip debug emulator EASE1000)
ISP (In-System Programming) function built-in
Minimum instruction execution time
30.5 μs (at 32.768 KHz system clock)
62.5ns/41.6ns (at 16 MHz/24MHz system clock)
Instruction system: 16-bit length instruction
Instruction set: Transfer, arithmetic operations, comparison, logic operations, multiplication/division, bit manipulations,
bit logic operations, jump, conditional jump, call return stack manipulations, arithmetic shift, and so on
On-chip debug function built-in (supported by LAPIS on-chip debug emulator EASE1000)
ISP (In-System Programming) function built-in
Minimum instruction execution time
30.5 μs (at 32.768 KHz system clock)
62.5ns/41.6ns (at 16 MHz/24MHz system clock)