Lapis, 16bit, ML62Q1200A Microcontroller, 32.76kHz, 32 kB Flash, 32-Pin TQFP
- RS 제품 번호:
- 180-8447
- 제조사 부품 번호:
- ML62Q1265A-NNNTB
- 제조업체:
- Lapis
본 이미지는 참조용이오니 재확인이 필요하시면 문의해주세요.
Subtotal (1 reel of 1000 units)*
₩2,804,960.00
현재 액세스할 수 없는 재고 정보 - 나중에 다시 확인해 주세요.
수량 | 한팩당 | 릴당* |
|---|---|---|
| 1000 + | ₩2,804.96 | ₩2,804,772.00 |
* 참고 가격: 실제 구매가격과 다를 수 있습니다
- RS 제품 번호:
- 180-8447
- 제조사 부품 번호:
- ML62Q1265A-NNNTB
- 제조업체:
- Lapis
사양
참조 문서
제정법과 컴플라이언스
제품 세부 사항
제품 정보를 선택해 유사 제품을 찾기
모두 선택 | 제품 정보 | 값 |
|---|---|---|
| 브랜드 | Lapis | |
| Family Name | ML62Q1200A | |
| Package Type | TQFP | |
| Mounting Type | Surface Mount | |
| Pin Count | 32 | |
| Data Bus Width | 16bit | |
| Program Memory Size | 32 kB | |
| Maximum Frequency | 32.76kHz | |
| RAM Size | 4 kB | |
| Typical Operating Supply Voltage | 5.5 (Maximum) V | |
| Number of I2C Channels | 2 | |
| Number of UART Channels | 2 | |
| Maximum Operating Temperature | +105 °C | |
| Number of ADC Units | 1 | |
| Program Memory Type | Flash | |
| Length | 7mm | |
| Minimum Operating Temperature | -40 °C | |
| Dimensions | 7 x 7 x 1mm | |
| Instruction Set Architecture | RISC | |
| Width | 7mm | |
| Data Rate | 2Mbit/s | |
| Height | 1mm | |
| ADCs | 1 (8 x 10 bit) | |
| 모두 선택 | ||
|---|---|---|
브랜드 Lapis | ||
Family Name ML62Q1200A | ||
Package Type TQFP | ||
Mounting Type Surface Mount | ||
Pin Count 32 | ||
Data Bus Width 16bit | ||
Program Memory Size 32 kB | ||
Maximum Frequency 32.76kHz | ||
RAM Size 4 kB | ||
Typical Operating Supply Voltage 5.5 (Maximum) V | ||
Number of I2C Channels 2 | ||
Number of UART Channels 2 | ||
Maximum Operating Temperature +105 °C | ||
Number of ADC Units 1 | ||
Program Memory Type Flash | ||
Length 7mm | ||
Minimum Operating Temperature -40 °C | ||
Dimensions 7 x 7 x 1mm | ||
Instruction Set Architecture RISC | ||
Width 7mm | ||
Data Rate 2Mbit/s | ||
Height 1mm | ||
ADCs 1 (8 x 10 bit) | ||
- COO (Country of Origin):
- JP
16-bit RISC CPU (CPU name: nX-U16/100)
Instruction system: 16-bit length instruction
Instruction set: Transfer, arithmetic operations, comparison, logic operations, multiplication/division, bit manipulations,
bit logic operations, jump, conditional jump, call return stack manipulations, arithmetic shift, and so on
On-chip debug function built-in (supported by LAPIS on-chip debug emulator EASE1000)
ISP (In-System Programming) function built-in
Minimum instruction execution time
30.5 μs (at 32.768 KHz system clock)
62.5ns/41.6ns (at 16 MHz/24MHz system clock)
Instruction system: 16-bit length instruction
Instruction set: Transfer, arithmetic operations, comparison, logic operations, multiplication/division, bit manipulations,
bit logic operations, jump, conditional jump, call return stack manipulations, arithmetic shift, and so on
On-chip debug function built-in (supported by LAPIS on-chip debug emulator EASE1000)
ISP (In-System Programming) function built-in
Minimum instruction execution time
30.5 μs (at 32.768 KHz system clock)
62.5ns/41.6ns (at 16 MHz/24MHz system clock)