Xilinx FPGA XC3S50AN-4TQG144I, Spartan-3AN 1584 Cells, 50000 Gates, 54kbit, 1584 Blocks, 144-Pin TQFP
- RS 제품 번호:
- 727-5992
- 제조사 부품 번호:
- XC3S50AN-4TQG144I
- 제조업체:
- Xilinx
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- RS 제품 번호:
- 727-5992
- 제조사 부품 번호:
- XC3S50AN-4TQG144I
- 제조업체:
- Xilinx
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모두 선택 | 제품 정보 | 값 |
|---|---|---|
| 브랜드 | Xilinx | |
| Family Name | Spartan-3AN | |
| Number of Logic Gates | 50000 | |
| Number of Logic Cells | 1584 | |
| Number of Logic Units | 1584 | |
| Dedicated DSP | Yes | |
| Number of Multipliers | 3 (18 x 18) | |
| Mounting Type | Surface Mount | |
| Package Type | TQFP | |
| Pin Count | 144 | |
| Number of RAM Bits | 54kbit | |
| Dimensions | 20 x 20 x 1.45mm | |
| Height | 1.45mm | |
| Length | 20mm | |
| Maximum Operating Temperature | +100 °C | |
| Minimum Operating Supply Voltage | 1.14 V | |
| Width | 20mm | |
| Maximum Operating Supply Voltage | 1.26 V | |
| Minimum Operating Temperature | -40 °C | |
| 모두 선택 | ||
|---|---|---|
브랜드 Xilinx | ||
Family Name Spartan-3AN | ||
Number of Logic Gates 50000 | ||
Number of Logic Cells 1584 | ||
Number of Logic Units 1584 | ||
Dedicated DSP Yes | ||
Number of Multipliers 3 (18 x 18) | ||
Mounting Type Surface Mount | ||
Package Type TQFP | ||
Pin Count 144 | ||
Number of RAM Bits 54kbit | ||
Dimensions 20 x 20 x 1.45mm | ||
Height 1.45mm | ||
Length 20mm | ||
Maximum Operating Temperature +100 °C | ||
Minimum Operating Supply Voltage 1.14 V | ||
Width 20mm | ||
Maximum Operating Supply Voltage 1.26 V | ||
Minimum Operating Temperature -40 °C | ||
Field Programmable Gate Arrays, Spartan-3 I-Spec, Xilinx
Evaluation kits are available for assessing the Spartan-3 families:,Spartan-3A DSP starter platform (RS stock number: 697-3399),Spartan-3A evaluation kit (RS stock number: 697-2787),Spartan-3A platform evaluation kit (RS stock number: 697-3412),Spartan-3AN evaluation kit (RS stock number: 697-3406),Spartan-3E starter kit (RS stock number: 697-3428)
An FPGA is a semiconductor device consisting of a matrix of Configurable Logic Blocks (CLBs) connected through programmable interconnects. The user determines these interconnections by programming SRAM. A CLB can be simple (AND, OR gates, etc) or complex (a block of RAM). The FPGA allows changes to be made to a design even after the device is soldered into a PCB.