Infineon NOR 64 MB SPI, QPI, Parallel Flash Memory 8-Pin USON
- RS 제품 번호:
- 182-0113
- 제조사 부품 번호:
- S25FL064LABNFI041
- 제조업체:
- Infineon
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- RS 제품 번호:
- 182-0113
- 제조사 부품 번호:
- S25FL064LABNFI041
- 제조업체:
- Infineon
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모두 선택 | 제품 정보 | 값 |
|---|---|---|
| 브랜드 | Infineon | |
| Product Type | Flash Memory | |
| Memory Size | 64MB | |
| Interface Type | SPI, QPI, Parallel | |
| Package Type | USON | |
| Pin Count | 8 | |
| Organisation | 8M x 8 Bit | |
| Maximum Clock Frequency | 108MHz | |
| Mount Type | Surface | |
| Cell Type | NOR | |
| Maximum Supply Voltage | 3.6V | |
| Minimum Supply Voltage | 2.7V | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 85°C | |
| Standards/Approvals | No | |
| Width | 4 mm | |
| Length | 4mm | |
| Height | 0.55mm | |
| Series | S25FL064L | |
| Automotive Standard | AEC-Q100 | |
| Number of Words | 8K | |
| Number of Bits per Word | 8 | |
| Supply Current | 30mA | |
| Maximum Random Access Time | 8ns | |
| 모두 선택 | ||
|---|---|---|
브랜드 Infineon | ||
Product Type Flash Memory | ||
Memory Size 64MB | ||
Interface Type SPI, QPI, Parallel | ||
Package Type USON | ||
Pin Count 8 | ||
Organisation 8M x 8 Bit | ||
Maximum Clock Frequency 108MHz | ||
Mount Type Surface | ||
Cell Type NOR | ||
Maximum Supply Voltage 3.6V | ||
Minimum Supply Voltage 2.7V | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 85°C | ||
Standards/Approvals No | ||
Width 4 mm | ||
Length 4mm | ||
Height 0.55mm | ||
Series S25FL064L | ||
Automotive Standard AEC-Q100 | ||
Number of Words 8K | ||
Number of Bits per Word 8 | ||
Supply Current 30mA | ||
Maximum Random Access Time 8ns | ||
The Cypress FL-L Family devices are Flash Nonvolatile Memory products using: Floating Gate technology,65-nm process lithography The FL-L family connects to a host system via a Serial Peripheral Interface (SPI). Traditional SPI single bit serial input and output (Single I/O or SIO) is supported as well as optional two bit (Dual I/O or DIO) and four bit wide Quad I/O (QIO), and Quad Peripheral Interface (QPI) commands. In addition, there are Double Data Rate (DDR) read commands for QIO and QPI that transfer address and read data on both edges of the clock. The architecture features a Page Programming Buffer that allows up to 256-bytes to be programmed in one operation and provides individual 4 KB sector, 32 KB half block sector, 64 KB block sector, or entire chip erase. By using FL-L family devices at the higher clock rates supported, with Quad commands, the instruction read transfer rate can match or exceed traditional parallel interface, asynchronous, NOR Flash memories, while reducing signal count dramatically. The FL-L family products offer high densities coupled with the flexibility and fast performance required by a variety of mobile or embedded applications. Provides an ideal storage solution for systems with limited space, signal connections, and power. These memories offer flexibility and performance well beyond ordinary serial flash devices. They are ideal for code shadowing to RAM, executing code directly (XIP), and storing re-programmable data.
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