Renesas Electronics 8T49N241-999NLGI Clock Generator, 40-Pin 4 VFQFN

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Subtotal (1 tray of 490 units)*

₩6,052,284.00

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  • 2026년 5월 25일 부터 배송
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Per Tray*
490 - 1960₩12,351.60₩6,052,376.12
2450 +₩12,105.32₩5,931,330.44

* 참고 가격: 실제 구매가격과 다를 수 있습니다

RS 제품 번호:
216-6236
제조사 부품 번호:
8T49N241-999NLGI
제조업체:
Renesas Electronics
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브랜드

Renesas Electronics

Product Type

Clock Generator

Mount Type

Surface

Package Type

VFQFN

Pin Count

40

Minimum Supply Voltage

2.5V

Maximum Supply Voltage

3.3V

Minimum Operating Temperature

-40°C

Maximum Operating Temperature

85°C

Width

6 mm

Series

8T49N241

Standards/Approvals

No

Height

0.9mm

Length

6mm

Maximum Output Frequency

1GHz

Number of Outputs

4

Automotive Standard

No

The Renesas Electronics 8T49N241 has one fractional-feedback PLL that can be used as a jitter attenuator and frequency translator. It is equipped with one integer and three fractional output dividers, allowing the generation of up to four different output frequencies, ranging from 8kHz to 1GHz. These frequencies are completely independent of each other, the input reference frequencies, and the crystal reference frequency. The device places virtually no constraints on input to output frequency conversion, supporting all FEC rates, including the new revision of ITU-T Recommendation G.709 (2009), most with 0ppm conversion error. The outputs may select among LVPECL, LVDS, HCSL or LVCMOS output levels.

Supports SDH/SONET and Synchronous Ethernet clocks including all FEC rate conversions

0.35ps RMS Typical Jitter (including spurs): 12kHz to 20MHz

Operating Modes: Synthesizer, Jitter Attenuator

Operates from a 10MHz to 50MHz fundamental-mode crystal or a 10MHz to 125MHz external oscillator

Initial holdover accuracy of +50ppb.

Accepts up to 2 LVPECL, LVDS, LVHSTL or LVCMOS input clocks

Accepts frequencies ranging from 8kHz to 875MHz

Auto and manual clock selection with hitless switching

Clock input monitoring including support for gapped clocks

Phase-slope limiting and fully hitless switching options to control output clock phase transients

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